531KB1229M00DGR datasheet, PDF

Datasheet> All Categories > oscillator> 531KB1229M00DGR

531KB1229M00DGR: DescriptionCMOS/TTL Output Clock Oscillator, 1229MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; Categoryoscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531KB1229M00DGR Overview

CMOS/TTL Output Clock Oscillator, 1229MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531KB1229M00DGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	ROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Code	unknown
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	1229 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	CMOS/TTL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	1.89 V
Minimum supply voltage	1.71 V
Nominal supply voltage	1.8 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Practical circuit diagram that enables remote wake-up/shutdown

Dual tone telephone dialing display circuit diagram

Alarm type binary password control lock circuit

Contactless automatic charger

TMP47C433AN (television) microprocessor

High precision triangle wave oscillator

Several considerations for selecting a thermometer: [i=s]This post was last edited by 灞波儿奔 on 2019-1-6 16:21[/i] [size=5] When performing a temperature calibration, it is critical to select the correct thermometer for the reference probe and the device...; 灞波儿奔 Analogue and Mixed Signal

Today at 10 am [Live] TI and Avnet will help you quickly pass the new energy vehicle safety system certification: Today at 10:00 AM [Live Broadcast] TI and Avnet will help you quickly pass the safety system certification of new energy vehicles [backcolor=lime] Live broadcast time: [/backcolor] November 16, 2017 (...; EEWORLD社区 Automotive Electronics

As we all know, the drive of the C drive is 80h, what about the drive of the USB drive? ?: As we all know, the drive of the C drive is 80h, what about the drive of the USB drive? ?...; mekq Embedded System

The big choice between NPN and PNP transistor drive relay: Today, I will give beginners a common question. Regarding the use of transistors to drive relays in single-chip microcomputers. [b][color=#8b0000]Party A: [/color][/b]It is better to use NPN to drive ...; yaoyuanytu Analog electronics

Ask a programming question: assume cs:code,ss:stack,ds:code stack segment db 128 dup(0) stack ends code segment init: jmp short start table_index db 2,3,4,5 table dw sub3 ;1, clear, 2, set foreground, 3, set background, 4, scrol...; xzl Embedded System

About the size of USB 2.0 low-speed control transfer protocol overhead: I've been reading the USB2.0 protocol recently, and there's one thing I don't understand. That's the payload overhead of the low-speed control transfer. In USB2.0 table 5.1, why is PAYLOAD OVERHEAD 63...; 184848715 Embedded System

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components