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KK74HC174AD

Description
Hex D Flip-Flop with Common Clock and Reset High-Performance Silicon-Gate CMOS
File Size154KB,6 Pages
ManufacturerKODENSHI
Websitehttp://www.kodenshi.co.jp
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KK74HC174AD Overview

Hex D Flip-Flop with Common Clock and Reset High-Performance Silicon-Gate CMOS

TECHNICAL DATA
KK74HC174A
Hex D Flip-Flop with
Common Clock and Reset
High-Performance Silicon-Gate CMOS
The KK74HC174A is identical in pinout to the LS/ALS174. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LS/ALSTTL outputs.
This device consists of six D flip-flops with common Clock and Reset
inputs. Each flip-flop is loaded with a low-to-high transition of the Clock
input. Reset is asynchronous and active-low.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0
µA
High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
KK74HC174AN Plastic
KK74HC174AD SOIC
T
A
= -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Reset
L
PIN 16=V
CC
PIN 8 = GND
H
H
H
H
X = Don’t care
L = LOW voltage level
H = HIGH voltage level
L
Clock
X
D
X
H
L
X
X
Output
Q
L
H
L
no change
no change
1

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KK74HC174AD KK74HC174A KK74HC174AN
Description Hex D Flip-Flop with Common Clock and Reset High-Performance Silicon-Gate CMOS Hex D Flip-Flop with Common Clock and Reset High-Performance Silicon-Gate CMOS Hex D Flip-Flop with Common Clock and Reset High-Performance Silicon-Gate CMOS
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