74HC237D/T3 datasheet, PDF - EEWORLD Datasheet

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74HC237D/T3: DescriptionIC HC/UH SERIES, OTHER DECODER/DRIVER, TRUE OUTPUT, PDSO16, 3.90 MM, PLASTIC, MS-012, SOT-109-1, SOP-16, Decoder/Driver; Categorylogic logic; File Size104KB，19 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74HC237D/T3 Overview

IC HC/UH SERIES, OTHER DECODER/DRIVER, TRUE OUTPUT, PDSO16, 3.90 MM, PLASTIC, MS-012, SOT-109-1, SOP-16, Decoder/Driver

74HC237D/T3 Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	SOIC
package instruction	SOP,
Contacts	16
Reach Compliance Code	unknown
ECCN code	EAR99
Other features	ADDRESS LATCHES
series	HC/UH
Input adjustment	LATCHED
JESD-30 code	R-PDSO-G16
JESD-609 code	e4
length	9.9 mm
Logic integrated circuit type	OTHER DECODER/DRIVER
Humidity sensitivity level	1
Number of functions	1
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
propagation delay (tpd)	285 ns
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3.9 mm
Base Number Matches	1

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74HC237

3-to-8 line decoder, demultiplexer with address latches

Rev. 03 — 12 November 2004

Product data sheet

1. General description

The 74HC237 is a high-speed Si-gate CMOS device and is pin compatible with low power

Schottky TTL (LSTTL). The 74HC237 is speciﬁed in compliance with JEDEC

standard no. 7A.

The 74HC237 is a 3-to-8 line decoder, demultiplexer with latches at the three address

inputs (An). The 74HC237 essentially combines the 3-to-8 decoder function with a 3-bit

storage latch. When the latch is enabled (LE = LOW), the 74HC237 acts as a 3-to-8 active

LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present

at the inputs before this transition, is stored in the latches. Further address changes are

ignored as long as LE remains HIGH.

The output enable input (E1 and E2) controls the state of the outputs independent of the

address inputs or latch operation. All outputs are HIGH unless E1 is LOW and E2 is HIGH.

The 74HC237 is ideally suited for implementing non-overlapping decoders in 3-state

systems and strobed (stored address) applications in bus oriented systems.

2. Features

Combines 3-to-8 decoder with 3-bit latch

Multiple input enable for easy expansion or independent controls

Active HIGH mutually exclusive outputs

Low-power dissipation

Complies with JEDEC standard no. 7A

ESD protection:

HBM EIA/JESD22-A114-B exceeds 2000 V

MM EIA/JESD22-A115-A exceeds 200 V.

Multiple package options

Speciﬁed from

−40 °C

to +80

°C

and from

−40 °C

to +125

°C.

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