The SC4808A/B is a dual-ended, high frequency, integrated
PWM controller, optimized for isolated applications that
require minimum space. It can be configured for current
or voltage mode operation with required control circuitry
where secondary side error amplifier is used.
Some of the key features are high frequency operation of
1 MHz that allows the use of smaller components thus
saving cost and valuable board space. An internal ramp
on the Current Sense pin allows Internal Slope
Compensation programmed by an external resistor. Other
features include programmable frequency up to 1MHz,
Pulse by Pulse current and Line Monitoring Input with
Hysteresis to reduce stress on the power components.
A unique oscillator is used to synchronize two SC4808’s to
work out of phase. This minimizes the input and output
ripple thus reducing noise on the output line and reducing
stress and size of input/output filter components. The dual
outputs can be configured in Push-Pull, Half Bridge and
Full Bridge format with programmable dead time between
two outputs depending on the size of the timing
components.
The SC4808 also features a turn on threshold of 12V for
SC4808A and 4.4V for SC4808B. They are available in
MSOP-10 packages.
SC4808A/B
Features
120µA starting current
Pulse by pulse current limit
Programmable operation up to 1MHz
Internal soft start
Programmable line undervoltage lockout
Over current shutdown
Dual output drive stages on push-pull configuration
Programmable internal slope compensation
Programmable mode of operation (peak current mode
or voltage mode)
External frequency synchronization
Bi-phase mode of operation
-40 to 105 °C operating temperature
10 Pin MSOP lead free package available. WEEE and
RoHS compliant.
Applications
Telecom equipment and power supplies
Networking power supplies
Industrial power supplies
Push-pull converter
Half bridge converter
Full bridge converter
Isolated VRM’s
Typical Application Circuit
Vo
Vin
Gnd_Out
RSENSE
Gnd_In
OUTA
OUTB
CS
VCC
SYNC
RC
REF
SYNC
FB
LUVLO GND
SC4808
Revision October 20, 2005
1
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SC4808A/B
POWER MANAGEMENT
Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in
the Electrical Characteristics section is not implied.
Parameter
Supply Voltage
Supply C urrent
SYNC , RC ,C S, LUVLO, REF to GND
FB to GND
REF C urrent
OUTA/OUTB to GND
OUTA/OUTB Source C urrent (peak)
OUTA/OUTB Si nk C urrent (peak)
Power D i ssi pati on at T
A
= 25°C
Thermal Resi stance
Juncti on Temperature
Storage Temperature Range
Lead Temperature (Solderi ng) 10 Sec.
ESD Rati ng (Human Body Model)
Symbol
V
CC
I
CC
V
FB
I
REF
V
OUTA/B
I
source
I
sink
P
D
θ
J A
T
J
T
STG
T
LEAD
V
ESD
Maximum
-0.5 to18
20
-0.5 to 7
-0.5 to (V
REF
+ 0.5)
10
-0.5 to 18
-250
250
1.105
113.1
-40 to 150
-65 to 150
+300
2
U nits
V
mA
V
V
mA
V
mA
mA
W
°C /W
°C
°C
°C
kV
Electrical Characteristics
Unless specified: VCC = 12V; CL = 100pF; T
A
= -40°C to 105°C
Parameter
PWM
Maxi mum D uty C ycle
Mi ni mum D uty C ycle
C urrent Sense
Gai n
Maxi mum Input Si gnal
C S to Output D elay
Over C urrent Threshold
Internal Slope C ompensati on
Resi stor
FB to C S Offset
Output
OUT Low Level
OUT Hi gh Level
Ri se Ti me
Fall Ti me
Test C onditions
Min
Typ
Max
U nit
Fosc = 50kHz, FB = 5V,
Measured at OUTA or OUTB
Fosc = 50kHz, FB = 1.5V,
Measured at OUTA or OUTB
48
49
50
0
%
%
3
475
525
100
.850
.950
25
1.30
1.50
1.70
1
575
mV
ns
V
kΩ
V
0
11.0
.50
11.25
25
25
.70
12.00
V
V
ns
ns
2005 Semtech Corp.
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SC4808A/B
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless specified: VCC = 12V; CL = 100pF; T
A
= -40°C to 105°C
Parameter
VC C U nder Voltage Lockout
Start Threshold (SC 4808A)
Hysteresi s (SC 4808A)
Start Threshold (SC 4808B)
Hysteresi s (SC 4808B)
Line U nder Voltage Lockout
Start Threshold
Hysteresi s
Soft Start
Internal Soft Start Ramp
Soft Start D urati on (SC 4808A)
Test C onditions
Min
Typ
Max
U nit
10.75
3.5
4.0
40
12
4.5
4.40
70
13.25
5.5
4.5
110
V
V
V
mV
R23 = 14k
Ω
, R33 = 10k
Ω
(see page 14)
R23 = 14k
Ω
, R33 = 10k
Ω
(see page 14)
-3%
VREF
5.6% of
VREF
+3%
V
mV
200
Rcs = 7k
Ω
(See formula i n the appli cati on
i nformati on secti on on page 21)
Rcs = 1k
Ω
(See formula i n the appli cati on
i nformati on secti on on page 21)
110
µs/V
µs
Soft Start D urati on (SC 4808B)
12
µs
Soft Start D elay
Oscillator
Osci llator Frequency
Osci llator Ramp
RC pi n to GND capaci tance
Osci llator Frequency Range
Sync/C LOC K
C lock SYNC Threshold(SC 4808A)
C lock SYNC Threshold(SC 4808B)
Sync Frequency Range
B an d g ap
Reference Voltage (SC 4808A)
Reference C urrent (SC 4808A)
Reference Voltage (SC 4808B)
Reference C urrent (SC 4808B)
Overall
Startup C urrent
Operati ng Supply C urrent
VC C Zener Shunt Voltage
2005 Semtech Corp.
140
µs
R
osc
= 11k
Ω
, C
osc
= 200pF
450
500
VREF/2
+0.25
22
550
KHz
V
pF
50
1000
KHz
1.6
1.0
F
osc
*1.3
V
V
KHz
4.75
5.0
5
5.25
V
mA
2.970
3.125
5
3.280
V
mA
VC C < start threshold
FB = 0V, C S = 0V
ID D = 10mA
16
150
7
µA
mA
V
3
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SC4808A/B
POWER MANAGEMENT
Pin Configuration
Top View
Ordering Information
Part Number
SC4808AIMSTR
(1)
SC4808AIMSTRT
(1)(2)
SC4808BIMSTR
(1)
P ackag e
Temp. Range (T
A
)
MSOP-10
-40°C to 105°C
SC4808BIMSTRT
(1)(2)
(MSOP-10)
Notes:
(1) Only available in tape and reel packaging. A reel
contains 2500 devices.
(2) Lead free product. This product is fully WEEE and
RoHS compliant.
2005 Semtech Corp.
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SC4808A/B
POWER MANAGEMENT
Pin Descriptions
FB:
The inverting input to the PWM comparator. Stray in-
ductances and parasitic capacitance should be minimized
by utilizing ground planes and correct layout guide lines
(see page 22).
REF:
Bandgap reference output It should be by passed with
a 2.2uF low ESR capacitance, right at the IC pin.
CS:
Current sense input and internal slope compensation
are both provided via the CS pin. The current sense input
from a sense resistor is used for the peak current and
overcurrent comparators. An internal 1 to 3 feed back volt-
age divider provides a 3X amplification of the CS signal.
This is used for comparison to the external error amplifier
signal. If an external resistor is connected from CS to the
current sense resistor, the internal current source will pro-
vide a programmable slope compensation. The value of
the resistor will determine the level of compensation. At
higher compensation levels, voltage mode of operation can
be achieved.
RC:
The oscillator programming pin. The oscillator should
be referenced to a stable reference voltage for an accu-
rate and stable frequency. Only two components are re-
quired to program the oscillator, a resistor (tied to Vref and
RC), and a capacitor (tied to the RC and GND). The follow-
ing formula can be used for a close approximation of the
oscillator frequency.
F
OSC
_
A
≅
1
R
OSC
C
TOT
×
0.8
F
OSC
_
B
≅
1
R
OSC
C
TOT
×
0.9
LUVLO:
Line undervoltage lockout pin. An external resis-
tive divider will program the undervoltage lockout level. The
external divider should be referenced to the quiet analog
ground (see page 22). During the LUVLO, the driver out-
puts are disabled and the softstart is reset. This pin can
also function as an Enable/Disable.
SYNC:
SYNC is a positive edge triggered input with a thresh-
old set to 1.6V (SC4808A), and 1.0V (SC4808B).
In a single controller operation, SYNC could be grounded
or connected to an external synchronization clock within
the SYNC frequency range (see page 3). In the Bi-Phase
operation mode SYNC pins could be connected to the Cosc
(Timing Capacitors) of the other controller. This will force
an out of phase operation (see page 15).
GND:
Device power and analog ground. Careful attention
should be paid to the layout of the ground planes (see page
22).
OUTA and OUTB:
Out of phase gate drive stages. The
driver’s peak source and sink current drive capability of
100mA, enables the use of an external MOSFET driver or
a NPN/PNP transistor buffer.
The oscillator RC network programs the oscillator frequency,
which is twice the OUTA/OUTB frequency. To insure that
the outputs do not overlap, a dead time can be generated
between the two outputs by sizing the oscillator timing ca-
pacitor (see page 14).
VCC:
The supply input for the device. Once VCC has ex-
ceeded the UVLO limit, the internal reference, oscillator,
drivers and logic are powered up. A low ESR capacitance,
should be used for decoupling right at the IC pin to mini-
mize noise problems.
where:
C
TOT
=
C
OSC
+
C
SC
4808
+
C
Circuit
C
SC
4808
≅
22
pF
Where the frequency is in Hertz, resistance in ohms, and
capacitance in farads. The recommended range of timing
resistors is between 10 kohm and 200kohm and range of
timing capacitors is between 100pF and 1000pF. Timing
resistors less than 10 kohm should be avoided.
Refer to layout guide lines on page 22 to achieve best re-
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