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74ALVCH162374T

Description
ALVC/VCX/A SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, TSSOP-48
Categorylogic   
File Size80KB,10 Pages
ManufacturerSTMicroelectronics
Websitehttp://www.st.com/
Download Datasheet Parametric View All

74ALVCH162374T Overview

ALVC/VCX/A SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, TSSOP-48

74ALVCH162374T Parametric

Parameter NameAttribute value
MakerSTMicroelectronics
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP48,.3,20
Contacts48
Reach Compliance Codecompliant
seriesALVC/VCX/A
JESD-30 codeR-PDSO-G48
length12.5 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeBUS DRIVER
Maximum Frequency@Nom-Sup300000000 Hz
MaximumI(ol)0.012 A
Number of digits8
Number of functions2
Number of ports2
Number of terminals48
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output characteristics3-STATE WITH SERIES RESISTOR
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP48,.3,20
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
power supply3.3 V
Prop。Delay @ Nom-Sup4.6 ns
propagation delay (tpd)6.5 ns
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)2.7 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Trigger typePOSITIVE EDGE
width6.1 mm
Base Number Matches1
74ALVCH162374
LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP-FLOP (3-STATE)
WITH 3.6V TOLERANT INPUTS AND OUTPUTS
PRELIMINARY DATA
s
s
s
s
s
s
s
s
s
s
3.6V TOLERANT INPUTS AND OUTPUTS
HIGH SPEED :
t
PD
= 4.6 ns (MAX.) at V
CC
= 3.0 to 3.6V
t
PD
= 5.4 ns (MAX.) at V
CC
= 2.3 to 2.7V
t
PD
= 6.5 ns (MAX.) at V
CC
= 1.65V
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN) at V
CC
= 3.0V
|I
OH
| = I
OL
= 18mA (MIN) at V
CC
= 2.3V
|I
OH
| = I
OL
= 4mA (MIN) at V
CC
= 1.65V
BUS HOLD PROVIDED ON DATA INPUTS
26Ω SERIE RESISTORS IN OUTPUTS
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 1.65V to 3.6V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16374
LATCH-UP PERFORMANCE EXCEEDS
300mA (JESD 17)
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
TSSOP
ORDER CODES
PACKAGE
TSSOP
TUBE
T&R
74ALVCH162374T
PIN CONNECTION
DESCRIPTION
The 74ALVCH162374 is a low voltage CMOS 16
BIT D-TYPE LATCH with 3 STATE OUTPUTS
NON INVERTING fabricated with sub-micron
silicon gate and five-layer metal wiring C
2
MOS
technology. It is ideal for low power and very high
speed 1.65 to 3.6V applications; it can be
interfaced to 3.6V signal environment for both
inputs and outputs.
These flip-flops are controlled by two clock inputs
(nCK) and two output enable inputs (nOE).
On the positive transition of the (nCK), the nQ
outputs will be set to the logic state that were
setup at the nD inputs.
While the (nOE) input is low, the outputs (nQ) will
be in a normal state (HIGH or LOW logic level)
and while high level the outputs will be in a high
impedance state.
Any output control does not affect the internal
operation of flip flops; that is, the old data can be
retained or the new data can be entered even
while the outputs are off.The device circuits is
including 26Ω series resistance in the outputs.
These resistors permit to reduce line noise in high
speed applications.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
October 2002
1/10
This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice.

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