531DA1263M00DGR datasheet, PDF

Datasheet> All Categories > oscillator> 531DA1263M00DGR

531DA1263M00DGR: DescriptionCMOS/TTL Output Clock Oscillator, 1263MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; Categoryoscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531DA1263M00DGR Overview

CMOS/TTL Output Clock Oscillator, 1263MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531DA1263M00DGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	ROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Code	unknown
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	50%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	1263 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	CMOS/TTL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Constant current charging circuit

SF-310B rechargeable electric shaver circuit diagram

Little Swan Sacon range hood circuit diagram

M50110P/Ap/BP/CP (VCR, TV and audio equipment) 30-function infrared remote control transmitter circuit

Simple voltage controlled audio oscillator

Can any friend help me? Thank you.: Does anyone know what device the chip is? Please help me, thank you. The data given is DC003, but I can't find the information of this device. [[i] This post was last edited by xinuaile2003 on 2008-5-...; aaron0911 PCB Design

Has anyone ever connected CYCLONE II and Stratix chips to the same JTAG link?: The schematic diagram is designed like this. The 10-pin socket (FPGA program download port) is connected to the first EPC16, which is then connected to the EP2C70F672, and then the EP2C70F672 is conne...; eeleader-mcu FPGA/CPLD

c#2005 debugging wince5.0 cannot enter power off, waiting online: The error message is: the specified module has not been loaded. Which module has not been loaded?...; chenmo Embedded System

【About mini2440 BSP issue】: I am using the mini2440 board from Friendly Arm. The mini2440 smdk bsp downloaded from the Internet prompts when compiling the system: Found pTOC at 0000284c No imports for nk.exe No imports for cored...; ta7680cd7698 Embedded System

Simple 1~5V digital voltmeter problem using 0832: I just made it today, but the voltage displayed is 0.4V different from the voltage measured by the multimeter. When 0V input is displayed as 0.00V, 5V input can also display 5V, but when I connected t...; tonytong DIY/Open Source Hardware

High Definition DV Schematic Diagram: High Definition DV Schematic Diagram...; simonprince Analog electronics

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components