A
DVANCED
L
INEAR
D
EVICES,
I
NC.
ALD111933
DUAL N-CHANNEL ENHANCEMENT MODE EPAD®
MATCHED PAIR MOSFET ARRAY
V
GS(th)
= +3.3V
e
TM
EPAD
E
N
®
AB
LE
D
GENERAL DESCRIPTION
ALD111933 are monolithic dual N-Channel MOSFETs matched at the
factory using ALD’s proven EPAD® CMOS technology. These devices are
intended for low voltage, small signal applications.
ALD111933 MOSFETs are designed and built with exceptional device
electrical characteristics matching. Since these devices are on the same
monolithic chip, they also exhibit excellent tempco tracking characteris-
tics. Each device is versatile as a circuit element and is a useful design
component for a broad range of analog applications. They are basic build-
ing blocks for current sources, differential amplifier input stages, transmis-
sion gates, and multiplexer applications. For most applications, connect
V- and N/C pins to the most negative voltage potential in the system. All
other pins must have voltages within these voltage limits.
The ALD111933 devices are built for minimum offset voltage and differen-
tial thermal response, and they are designed for switching and amplifying
applications in +3.0V to +10V systems where low input bias current, low
input capacitance and fast switching speed are desired. Since these are
MOSFET devices, they feature very large (almost infinite) current gain in
a low frequency, or near DC, operating environment.
The ALD111933 are suitable for use in precision applications which re-
quire very high current gain, beta, such as current mirrors and current
sources. The high input impedance and the high DC current gain of the
Field Effect Transistors result in extremely low current loss through the
control gate. The DC current gain is limited by the gate input leakage
current, which is specified at 30pA at room temperature. For example, DC
beta of the device at a drain current of 3mA and input leakage current of
30pA at 25°C is = 3mA/30pA = 100,000,000.
FEATURES
• Enhancement-mode (normally off)
• Standard Gate Threshold Voltages: +3.3V
• Matched MOSFET to MOSFET characteristics
• Tight lot to lot parametric control
• Parallel connection of MOSFETs to increase drain currents
• Low input capacitance
• V
GS(th)
match to 20mV
• High input impedance — 10
12
Ω
typical
• Positive, zero, and negative V
GS(th)
temperature coefficient
• DC current gain >10
8
• Low input and output leakage currents
ORDERING INFORMATION
(“L”suffix for lead free version)
Operating Temperature Range*
0°C to +70°C
8-Pin
Plastic Dip
Package
ALD111933PAL
8-Pin
MSOP
Package
ALD111933MAL
8-Pin
SOIC
Package
ALD111933SAL
APPLICATIONS
• Precision current mirrors
• Precision current sources
• Voltage choppers
• Differential amplifier input stages
• Discrete voltage comparators
• Voltage bias circuits
• Sample and Hold circuits
• Analog inverters
• Level shifters
• Source followers and buffers
• Current multipliers
• Discrete analog multiplexers/matrices
• Discrete analog switches
• Low current voltage clamps
• Voltage detectors
• Capacitive probes
• Sensor interfaces
• Peak detectors
• Level shifters
• Multiple preset voltage hysteresis circuits
(with other VGS(th) EPAD MOSFETS)
• Energy harvesting circuits
• Zero standby power voltage monitors
PIN CONFIGURATION
ALD111933
V-
N/C*
1
2
3
4
V-
8
7
6
5
G
N2
D
N2
V-
S
N2
G
N1
D
N1
S
N1
MA, PA, SA PACKAGES
*N/C pin is internally connected.
Connect to V- to reduce noise
* Contact factory for industrial or military temp. ranges or user-specified threshold voltage values.
© 2006 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com
ABSOLUTE MAXIMUM RATINGS
Drain-Source voltage,
V
DS
Gate-Source voltage,
V
GS
Power dissipation
Operating temperature range PA, SA, MA package
Storage temperature range
Lead temperature, 10 seconds
10.6V
10.6V
500 mW
0°C to +70°C
-65°C to +150°C
+260°C
OPERATING ELECTRICAL CHARACTERISTICS
V- = GND TA = 25
°
C unless otherwise specified
CAUTION:
ESD Sensitive Device. Use static control procedures in ESD controlled environment.
ALD111933
Parameter
Gate Threshold Voltage
Offset Voltage
VGS(th)1-VGS(th)2
Offset VoltageTempco
GateThreshold Voltage Tempco
Symbol
VGS(th)
Min
3.25
Typ
3.3
Max
3.35
Unit
V
Test Conditions
IDS =1µA
VDS = 0.1V
IDS =1µA
VDS1 = VDS2
ID = 1µA
ID = 20µA, VDS = 0.1V
ID = 40µA
VGS = +10.0V
VGS = + 7.3V
VDS = + 5V
VGS = +7.3V
VDS = +10.4V
VOS
TC
∆
VOS
TC∆VGS(th)
2
5
-1.7
0.0
+1.6
6.9
3.0
20
mV
µV/ °C
mV
°C
On Drain Current
IDS (ON)
mA
Forward Transconductance
GFS
∆G
FS
GOS
RDS (ON)
∆R
DS (ON)
1.4
mmho
Transconductance Mismatch
1.8
%
VGS = + 7.3V
VDS = +10.4V
VDS = 0.1V
VGS = +5.9V
VDS = 0.1V
VGS = +7.3V
IDS = 1.0µA
VGS =+2.3V
VGS = +2.3V
VDS =10V, TA = 125°C
VDS = 0V VGS = 10V
TA =125°C
Output Conductance
Drain Source On Resistance
68
500
µmho
Ω
Drain Source On Resistance
Mismatch
Drain Source Breakdown Voltage
0.5
%
BVDSX
IDS (OFF)
10
V
Drain Source Leakage Current
1
10
100
4
30
1
pA
nA
pA
nA
pF
pF
ns
ns
dB
Gate Leakage Current
1
IGSS
CISS
CRSS
ton
toff
3
Input Capacitance
Transfer Reverse Capacitance
Turn-on Delay Time
Turn-off Delay Time
Crosstalk
2.5
0.1
10
10
60
V+ = 5V RL= 5KΩ
V+ = 5V RL= 5KΩ
f = 100KHz
Notes:
1
Consists of junction leakage currents
ALD111933
Advanced Linear Devices
2
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