EEWORLDEEWORLDEEWORLD

Part Number

Search

531HA1128M00DGR

Description
CMOS/TTL Output Clock Oscillator, 1128MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
Categoryoscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

531HA1128M00DGR Overview

CMOS/TTL Output Clock Oscillator, 1128MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531HA1128M00DGR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
package instructionROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Codeunknown
Other featuresTAPE AND REEL
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability50%
JESD-609 codee4
Manufacturer's serial number531
Installation featuresSURFACE MOUNT
Nominal operating frequency1128 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeCMOS/TTL
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage2.75 V
Minimum supply voltage2.25 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
Base Number Matches1
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
Motorola Electronic Design Competition Outstanding Works (Part 9)
[i=s]This post was last edited by paulhyde on 2014-9-15 08:54[/i]...
clark Electronics Design Contest
Which expert please give me some advice: Bias of signal waveform
Could any expert please give me some advice on the bias of the signal waveform? I want to offset a triangle wave with a base point of 2.5V, a maximum point of 3.6V, and a minimum point of 1.3V to the ...
kibby0 Analog electronics
Problems on connecting the neutral points of two DC circuits with different voltages
[i=s]This post was last edited by sunboy25 on 2017-6-6 10:08[/i] I would like to ask why the circuit can still work normally after the two neutral points A and B in the circuit diagram below are conne...
sunboy25 Power technology
This week's highlights
[url=https://e2echina.ti.com/question_answer/dsp_arm/sitara_arm/f/25/t/134026][font=微软雅黑][size=4]EtherCAT implemented based on CPSW of AM335x[/size][/font][/url][font=微软雅黑][size=4][color=#000000] [/co...
橙色凯 DSP and ARM Processors
Talk about my IRIG-B custom component design and debugging summary based on SOPC
Keywords: SOPC, custom component, IRIG-B, debugging [b]I. Case description [/b] Recently, I plan to use SOPC to build a system to complete the upgrade of the project platform. Since the platform based...
wdgui522 FPGA/CPLD
The main components of switching power supply: switching power supply transformer, switching power supply principle and design (serial 47)
[b]Chapter 2 Main Components of Switching Power Supply 2-1. Switching Power Supply Transformer[/b] Modern electronic equipment has higher and higher technical performance indicators such as working ef...
noyisi112 Power technology

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1936  2140  2280  882  2644  39  44  46  18  54 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号