REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
C
Added CAGE number 1FN41 and 34335 to the drawing as approved
sources of supply. Added vendor CAGE number 18324 to device
types 01ZX, 02ZX, and 03ZX, with changes to margin test methods A
and B. Added device type 07 to the drawing for vendor CAGE
number 65579 with changes to table I. Deleted figure 5 and table III.
Also, deleted program method column from 6.6. Editorial changes
throughout.
Added provisions for the addition of QD certified parts to drawing.
Updated boilerplate. Added CAGE OC7V7 as supplier. - glg
Corrected marking paragraph 3.5, updated boilerplate paragraphs. ksr
Boilerplate update, part of 5-year review. ksr
Update drawing to meet current MIL-PRF-38535 requirements. – glg
89-10-30
M. A. Frye
D
00-06-23
Raymond Monnin
E
F
G
05-03-28
11-03-03
17-12-06
Raymond Monnin
Charles F. Saffle
Charles Saffle
CURRENT CAGE CODE 67268
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
REV
SHEET
PREPARED BY
Sandra Rooney
CHECKED BY
D A DiCenzo
APPROVED BY
N A. Hauck
G
1
G
2
G
3
G
4
G
5
G
6
G
7
G
8
G
9
G
10
G
11
G
12
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.dla.mil/landandmaritime
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DRAWING APPROVAL DATE
10 January 1986
REVISION LEVEL
G
MICROCIRCUITS, MEMORY,
DIGITAL, CMOS, 8K x 8 UV
ERASABLE PROM, MONOLITHIC
SILICON
SIZE
A
SHEET
CAGE CODE
14933
1 OF
12
85102
5962-E139-18
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release. Distribution is unlimited.
1. SCOPE
1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in
accordance with MIL-PRF-38535, appendix A.
1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example:
85102
01
Y
A
Drawing number
Device type
(see 1.2.1)
Case outline
(see 1.2.2)
Lead finish
(see 1.2.3)
1.2.1 Device type(s). The device type(s) shall identify the circuit function as follows:
Device type
01
02
03
04
05
06
07
Generic number
27C64-25
27C64-35
27C64-20
27C64-90
27C64-12
27C64-15
57C64-70
Circuit
8K x 8-bit CMOS UVEPROM
8K x 8-bit CMOS UVEPROM
8K x 8-bit CMOS UVEPROM
8K x 8-bit CMOS UVEPROM
8K x 8-bit CMOS UVEPROM
8K x 8-bit CMOS UVEPROM
8K x 8-bit CMOS UVEPROM
Access time
250 ns
350 ns
200 ns
90 ns
120 ns
150 ns
70 ns
1.2.2 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835, and as follows:
Outline letter
Y
Z
Descriptive designator
GDIP1-T28 or CDIP2-T28
CQCC1-N32
Terminals
28
32
Package style 1/
dual-in-line package
rectangular chip carrier package
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.
1.3 Absolute maximum ratings.
Storage temperature range ..............................................
All input or output voltages with respect
to ground .......................................................................
Voltage on A
9
with respect to ground ...............................
V
PP
supply voltage with respect to ground
during programming .......................................................
Maximum power dissipation (P
D
): 3/
Device types 01 and 03 ..................................................
Device type 02 ................................................................
Device types 04, 05, 06, and 07 ....................................
Lead temperature (soldering, 10 seconds) .......................
Thermal resistance, junction-to-case (Θ
JC
):
Cases Y and Z ................................................................
Junction temperature (T
J
)
...................................................
Data Retention
......................................................................
-65°C to +150°C
-2.0 V dc to +7.0 V dc 2/
-2.0 V dc to +13.5 V dc 2/
-2.0 V dc to +14.0 V dc 2/
170 mW
140 mW
550 mW
+300°C
See MIL-STD-1835
+150°C
10 years, minimum
1/ Lid shall be transparent to permit ultraviolet light erasure.
2/ Minimum dc input voltage is -0.5 V dc, during transitions, the inputs may undershoot to -2.0 V dc for periods less than 20 ns.
3/ Must withstand the added P
D
due to short-circuit test; e.g., I
OS
.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
SIZE
A
REVISION LEVEL
G
85102
SHEET
2
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
1.4 Recommended operating conditions.
Case operating temperature range (T
C
) ...........................
Input low voltage +10% supply (V
IL
).................................
Input high voltage +10% supply (V
IH
) ...............................
Supply voltage range (V
CC
) ...............................................
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 -
MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
-55°C to +125°C
-0.5 V dc to +0.8 V dc
2.0 V dc to V
CC
+0.5 V dc
4.5 V dc to 5.5 V dc
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 -
MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at
http://quicksearch.dla.mil/
or from the Standardization Document Order
Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-
JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer
Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-
38535 may be processed as QML product in accordance with the manufacturer's approved program plan and qualifying activity
approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make
modifications to the requirements herein. These modifications shall not affect the PIN as described herein. A "Q" or "QML"
certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. This drawing has
been modified to allow the manufacturer to use the alternate die/fabrication requirements of paragraph A.3.2.2 of MIL-PRF-
38535 or alternative approved by the Qualifying Activity.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535, appendix A and herein.
3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.2 Truth tables. The truth table shall be as specified on figure 2.
3.2.2.1 Programmed devices. The requirements for supplying programmed devices are not a part of this drawing.
3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
SIZE
A
REVISION LEVEL
G
85102
SHEET
3
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics.
Test
Symbol
Conditions
-55°C < T
C
< +125°C
4.5 V < V
CC
< 5.5 V
unless otherwise specified
V
IN
= 5.5 V or GND 1/
V
OUT
= 5.5 V or GND
Group A
subgroups
Device
types
Min
1, 2, 3
1, 2, 3
All
All
04
01,03
02
05
06
07
04
01,02,03
05
06
07
01,02,03
04,05,06
07
01,02,03
04,05,06
07
V
PP
read current 5/
I
PP
V
PP
= V
CC
1, 2, 3
All
-10
-10
Limits
Max
10
10
75
30
25
65
60
65
60
10
55
50
70
1
2
15
140
200
500
100
µA
V
V
V
mA
mA
µA
µA
Unit
Input load current
Output leakage
current
Operating current,
TTL inputs 2/
I
LI
I
LO
I
CC
TTL
CE
=
OE
= V
IL
V
CC
= V
PP
0
0-7
= 0 mA
f = 5 MHz max
1, 2, 3
Operating current 3/
I
CC
CMOS
1, 2, 3
Standby current,
TTL inputs 2/
I
SB
TTL
CE
=
OE
= V
IH
f = 0 MHz
0
0-7
= disabled
1, 2, 3
mA
Standby current,
CMOS inputs 4/
I
SB
CMOS
1, 2, 3
µA
Input low voltage
(TTL + 10% supply)
Input high voltage
(TTL + 10% supply)
Output low voltage
V
IL
6/
V
IH
6/
V
OL
V
PP
= V
CC
1, 2, 3
1, 2, 3
All
All
01-06
07
-0.5
2.0
0.8
V
CC
+
0.5
0.45
0.4
V
IL
= 0.8 V, V
IH
= 2.0 V
I
OL
= 2.1 mA
1, 2, 3
Output high voltage
Output short-circuit
current
V
OH
I
OS
6/
V
IL
= 0.8 V, V
IH
= 2.0 V
I
OH
= -400 µA
1, 2, 3
1, 2, 3
All
All
2.4
100
V
mA
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
SIZE
A
REVISION LEVEL
G
85102
SHEET
4
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics - continued.
Test
Symbol
Conditions
-55°C < T
C
< +125°C
4.5 V < V
CC
< 5.5 V
unless otherwise specified
Group A
subgroups
Device
types
Min
1, 2, 3
V
IN
= 0 V, See 4.3.1c
V
OUT
= 0 V, See 4.3.1c
See 4.3.1e
t
ACC
8/ 9/
CE
=
OE
= V
IL
Limits
Max
V
CC
10
12
Unit
V
PP
read voltage 7/
Input capacitance
Output capacitance
Functional tests
Address to output delay
V
PP
C
IN
C
OUT
All
All
All
All
04
01
02
03
05
06
07
04
01
02
03
05
06
07
04,07
01
02
03
05
06
04,07
01,03
02
05
06
01-06
07
V
CC
-
0.7
V
pF
pF
4
4
7, 8A,8B
9, 10, 11
90
250
350
200
120
150
70
90
250
350
200
120
150
70
30
100
120
75
35
45
25
55
105
35
40
ns
CE
to output delay
t
CE
8/ 9/
OE
= V
IL
9, 10, 11
ns
OE
to output delay
t
OE
8/ 9/
CE
= V
IL
9, 10, 11
ns
OE
high to output float
8/ 9/
t
DF
6/
9, 10, 11
0
0
0
0
0
10
ns
Output hold from
addresses,
CE
or
OE
whichever occurred
first 8/ 9/
t
OH
6/
CE
=
OE
= V
IL
ns
1/ Pins not tested are all at GND and 5.5 V respectively.
2/ TTL inputs: Specify V
IL
and V
IH
levels.
3/ CMOS inputs: GND +0.2 V to V
CC
+0.2 V.
4/
5/
6/
7/
8/
9/
CE
= V
CC
+0.2 V. All other inputs can have any value within specified limits.
Maximum active power usage is the sum of I
PP
+ I
CC
.
If not tested, shall be guaranteed to the limits specified in table I.
V
PP
may be connected directly to V
CC
except during programming.
Outputs shall be loaded in accordance with figure 3.
See figure 4.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
SIZE
A
REVISION LEVEL
G
85102
SHEET
5
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
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