OT PLD, 12ns, PLS-Type, CMOS, PDIP28, 0.300 INCH, PLASTIC, DIP-28
| Parameter Name | Attribute value |
| Is it Rohs certified? | incompatible |
| Maker | Cypress Semiconductor |
| Parts packaging code | DIP |
| package instruction | 0.300 INCH, PLASTIC, DIP-28 |
| Contacts | 28 |
| Reach Compliance Code | not_compliant |
| Other features | 32 SYNCHRONOUS STATE MACROCELLS; INPUT MACROCELLS; 1 EXTERNAL CLOCK |
| Architecture | PLS-TYPE |
| maximum clock frequency | 72.9 MHz |
| JESD-30 code | R-PDIP-T28 |
| JESD-609 code | e0 |
| length | 35.4965 mm |
| Dedicated input times | 8 |
| Number of I/O lines | 4 |
| Number of entries | 12 |
| Output times | 14 |
| Number of product terms | 82 |
| Number of terminals | 28 |
| Maximum operating temperature | 70 °C |
| Minimum operating temperature | |
| organize | 8 DEDICATED INPUTS, 4 I/O |
| Output function | MACROCELL |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | DIP |
| Encapsulate equivalent code | DIP28,.3 |
| Package shape | RECTANGULAR |
| Package form | IN-LINE |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
| power supply | 5 V |
| Programmable logic type | OT PLD |
| propagation delay | 12 ns |
| Certification status | Not Qualified |
| Maximum seat height | 4.826 mm |
| Maximum supply voltage | 5.5 V |
| Minimum supply voltage | 4.5 V |
| Nominal supply voltage | 5 V |
| surface mount | NO |
| technology | CMOS |
| Temperature level | COMMERCIAL |
| Terminal surface | Tin/Lead (Sn/Pb) |
| Terminal form | THROUGH-HOLE |
| Terminal pitch | 2.54 mm |
| Terminal location | DUAL |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| width | 7.62 mm |
| Base Number Matches | 1 |
京公网安备 11010802033920号
EEWORLD
