530FB1391M00DG datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > oscillator> 530FB1391M00DG

530FB1391M00DG: DescriptionLVDS Output Clock Oscillator, 1391MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; Categoryoscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

530FB1391M00DG Overview

LVDS Output Clock Oscillator, 1391MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530FB1391M00DG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	ROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Code	unknown
Is Samacsys	N
Other features	TRAY
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	530
Installation features	SURFACE MOUNT
Nominal operating frequency	1391 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVDS
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Thyristor controlled contact welding machine circuit

DC power supply non-stop switching circuit using thyristor

Prevent misoperation of control circuits in both places

Galanz WD800B, WD800BS computerized barbecue microwave oven circuit diagram

TDA2040 power amplifier circuit

Computer motherboard circuit diagram 830_13

The information on the varactor diode, laser pointer, supercapacitor, TF card and SD card on the list is all here!: The list is out and can be seen here: https://bbs.eeworld.com.cn/thread-1084541-1-1.html Welcome everyone to guess the questions: https://bbs.eeworld.com.cn/thread-1084544-1-1.htmlList of component in...; okhxyyo Energy Infrastructure?

counter: 0 to 99 counter, digital tube display. C program, proteus circuit diagram are all in it!...; Gallen0105 MCU

Raspberry Pi price hike is outrageous: The boards that used to cost over 200 yuan are now over 600 yuan. I don't believe that no one is raising the price. Even if the US prints money, it's not that exaggerated. Wait for the price to drop....; 星海晨 MicroPython Open Source section

Wince6.0 IE's built-in printing function is not normal!!!: Wince6.0 supports the built-in printing function of IE, but the built-in printing of IE fails when calling the ExecWB function. However, the built-in printing of WordPad on the same system has no prob...; zhaojiang1 Embedded System

How to use BLACKBOX: The method is very simple, inspired by ISE's Core Generator. For example, every time a FIFO is generated, HDL code and ngc file will be generated. This ngc file is the synthesized netlist. The hdl fil...; eeleader-mcu FPGA/CPLD

An MP3 I made: [b]An MP3 I made before[/b] I once made a small MP3 experiment, using the ST solution. Some of the other parts were used for other purposes, and some were discarded. This small board was preserved, an...; 团团流水 MCU

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components