REI Datasheet
SN74ALS841, SN74AS841A, SN74ALS842
10-Bit Bus-Interface D-Type Latches with 3-State Outputs
These 10-bit latches feature 3-state outputs designed specifically for driving highly capacitive or
relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O
ports, bidirectional bus drivers, and working registers.
The ten latches are transparent D-type latches. The SN74ALS841 and SN74AS841A have
noninverting data (D) inputs. The SN74ALS842 has inverting D inputs.
Rochester Electronics
Manufactured Components
Rochester branded components are
manufactured using either die/wafers
purchased from the original suppliers
or Rochester wafers recreated from the
original IP. All recreations are done with
the approval of the OCM.
Parts are tested using original factory
test programs or Rochester developed
test solutions to guarantee product
meets or exceeds the OCM data sheet.
Quality Overview
• ISO-9001
• AS9120 certification
• Qualified Manufacturers List (QML) MIL-PRF-38535
• Class Q Military
• Class V Space Level
• Qualified Suppliers List of Distributors (QSLD)
• Rochester is a critical supplier to DLA and
meets all industry and DLA standards.
Rochester Electronics, LLC is committed to supplying
products that satisfy customer expectations for
quality and are equal to those originally supplied by
industry manufacturers.
The original manufacturer’s datasheet accompanying this document reflects the performance
and specifications of the Rochester manufactured version of this device. Rochester Electronics
guarantees the performance of its semiconductor products to the original OEM specifications.
‘Typical’ values are for reference purposes only. Certain minimum or maximum ratings may be
based on product characterization, design, simulation, or sample testing.
© 2013 Rochester Electronics, LLC. All Rights Reserved 12232013
To learn more, please visit
www.rocelec.com
SN74ALS841, SN74AS841A, SN74ALS842
10-BIT BUS-INTERFACE D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995
•
•
•
•
•
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3-State Buffer-Type Outputs Drive Bus
Lines Directly
Bus-Structured Pinout
Provide Extra Bus-Driving Latches
Necessary for Wider Address/Data Paths or
Buses With Parity
Buffered Control Inputs to Reduce
dc Loading Effects
Power-Up High-Impedance State
Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic (NT) 300-mil DIPs
SN74ALS841, SN74AS841A . . . DW OR NT PACKAGE
(TOP VIEW)
description
These 10-bit latches feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
The ten latches are transparent D-type latches.
The SN74ALS841 and SN74AS841A have
noninverting data (D) inputs. The SN74ALS842
has inverting D inputs.
A buffered output-enable (OE) input places the ten
outputs in either a normal logic state (high or low
logic levels) or a high-impedance state. In the
high-impedance state, the outputs neither load
nor drive the bus lines significantly. The
high-impedance state and increased drive provide
the capability to drive bus lines without interface or
pullup components.
OE
1D
2D
3D
4D
5D
6D
7D
8D
9D
10D
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
9Q
10Q
LE
SN74ALS842 . . . DW OR NT PACKAGE
(TOP VIEW)
OE
1D
2D
3D
4D
5D
6D
7D
8D
9D
10D
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
9Q
10Q
LE
OE does not affect the internal operation of the latches. Previously stored data can be retained or new data can
be entered while the outputs are off.
The SN74ALS841, SN74AS841A, and SN74ALS842 are characterized for operation from 0°C to 70°C.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
©
1995, Texas Instruments Incorporated
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
1
SN74ALS841, SN74AS841A, SN74ALS842
10-BIT BUS-INTERFACE D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995
Function Tables
SN74ALS841, SN74AS841A
INPUTS
OE
L
L
L
H
LE
H
H
L
X
D
H
L
X
X
OUTPUT
Q
H
L
Q0
Z
SN74ALS842
INPUTS
OE
L
L
L
H
LE
H
H
L
X
D
H
L
X
X
OUTPUT
Q
L
H
Q0
Z
logic symbols
†
SN74ALS841, SN74AS841A
OE
LE
1D
2D
3D
4D
5D
6D
7D
8D
9D
10D
1
13
2
3
4
5
6
7
8
9
10
11
EN
C1
1D
23
22
21
20
19
18
17
16
15
14
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
9Q
10Q
OE
LE
1D
3
2D
3D
4D
5D
6D
7D
8D
9D
10D
4
5
6
7
8
9
10
11
1
13
2
SN74ALS842
EN
C1
1D
23
22
21
20
19
18
17
16
15
14
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
9Q
10Q
† These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
2
POST OFFICE BOX 655303
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DALLAS, TEXAS 75265
SN74ALS841, SN74AS841A, SN74ALS842
10-BIT BUS-INTERFACE D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995
logic diagrams (positive logic)
SN74ALS841, SN74AS841A
OE
1
LE
13
C1
1D
2
1D
23
1Q
To Nine Other Channels
SN74ALS842
OE
1
LE
13
C1
1D
2
1D
23
1Q
To Nine Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, V
I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, T
A
: SN74ALS841, SN74ALS842 . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
POST OFFICE BOX 655303
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3
SN74ALS841, SN74AS841A, SN74ALS842
10-BIT BUS-INTERFACE D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SDAS059C – DECEMBER 1983 – REVISED JANUARY 1995
recommended operating conditions
SN74ALS841
SN74ALS842
MIN
VCC
VIH
VIL
IOH
IOL
tw
tsu
th
TA
Supply voltage
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Pulse duration, LE high
Setup time, data before LE↓
Hold time, data after LE↓
Operating free-air temperature
20
10
5
0
70
4.5
2
0.8
– 2.6
24
NOM
5
MAX
5.5
V
V
V
mA
mA
ns
ns
ns
°C
UNIT
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
VOL
IOZH
IOZL
II
IIH
IIL
IO‡
SN74ALS841
ICC
SN74ALS842
VCC = 5.5 V
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
VCC = 4.5 V,
VCC = 4 5 V
4.5
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V
II = – 18 mA
IOH = – 0.4 mA
IOH = – 2.6 mA
IOL = 12 mA
IOL = 24 mA
VO = 2.7 V
VO = 0.4 V
VI = 7 V
VI = 2.7 V
VI = 0.4 V
VO = 2.25 V
Outputs high
Outputs low
Outputs disabled
Outputs high
Outputs low
Outputs disabled
– 30
19
38
23
20
48
27
SN74ALS841
SN74ALS842
MIN
VCC – 2
2.4
TYP†
MAX
– 1.2
3.2
0.25
0.35
0.4
0.5
20
– 20
0.1
20
– 0.1
– 112
30
62
40
35
74
44
mA
V
V
V
µA
µA
mA
µA
mA
mA
UNIT
† All typical values are at VCC = 5 V, TA = 25°C.
‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
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