IMAGE SENSOR
CCD area image sensor
S9972/S9973 series
Front-illuminated FFT-CCD, high IR sensitivity
S9972/S9973 series are families of FFT-CCD image sensors specifically designed for low-light-level detection in scientific applications. By using
the binning operation, S9972/S9973 series can be used as a linear image sensor having a long aperture in the direction of the device length. This
makes S9972/S9973 series ideally suited for use in spectrophotometry. The binning operation offers significant improvement in S/N and signal
processing speed compared with conventional methods by which signals are digitally added by an external circuit. S9972/S9973 series also
feature low noise and low dark signal (MPP mode operation). This enables low-light-level detection and long integration time, thus achieving a
wide dynamic range.
S9972/S9973 series have an effective pixel size of 24 × 24 µm and are available in image areas of 24.576 (H) × 2.976 (V) mm
2
(1024 × 124
pixels) and 24.576 (H) × 6.048 (V) mm
2
(1024 × 252 pixels). S9972/S9973 series are pin compatible with S9970/S9971 series. (Operating
conditions and characteristics are a little bit different from S9970/S9971 series.)
Features
Applications
l
1024 (H) × 124 (V) and 1024 (H) × 252 (V) pixel format
l
Pixel size: 24 × 24 µm
l
Line/pixel binning
l
100 % fill factor
l
Wide dynamic range
l
Low dark signal
l
Low readout noise
l
MPP operation
l
High IR sensitivity
s
Selection guide
Type No.
S9972-1007
S9972-1008
S9973-1007
S9973-1008
Cooling
Non-cooled
One-stage
TE-cooled
l
Fluorescence spectrometer, ICP
l
Raman spectrometer
l
Industrial inspection requiring
l
Semiconductor inspection
l
DNA sequencer
l
Low-light-level detection
Number of total pixels
1044 × 128
1044 × 256
1044 × 128
1044 × 256
Number of active pixels
1024 × 124
1024 × 252
1024 × 124
1024 × 252
Active area
[mm (H) × mm (V)]
24.576 × 2.976
24.576 × 6.048
24.576 × 2.976
24.576 × 6.048
s
General ratings
Specification
Pixel size
24 (H) × 24 (V) µm
Vertical clock phase
2 phase
Horizontal clock phase
2 phase
Output circuit
One-stage MOSFET source follower
Package
24 pin ceramic DIP (refer to dimensional outlines)
S9972 series: quartz glass
Window *
1
S9973 series: sapphire glass
*1: Temporary window type and UV coat type are available upon request.
(Temporary window is fixed by tape to protect the CCD chip and wire bonding.)
Temporary window type: expressed by “N” ex. S9972-1007N
UV coat type: expressed by “UV” ex. S9972-1007UV
Parameter
PRELIMINARY DATA
Nov. 2005
1
CCD area image sensor
s
Absolute maximum ratings (Ta=25 °C)
Parameter
Operating temperature
Storage temperature
OD voltage
RD voltage
ISV voltage
ISH voltage
IGV voltage
IGH voltage
SG voltage
OG voltage
RG voltage
TG voltage
Vertical clock voltage
Horizontal clock voltage
Symbol
Topr
Tstg
V
OD
V
RD
V
ISV
V
ISH
V
IG1V
, V
IG2V
V
IG1H
, V
IG2H
V
SG
V
OG
V
RG
V
TG
V
P1V
, V
P2V
V
P1H
, V
P2H
Min.
-50
-50
-0.5
-0.5
-0.5
-0.5
-15
-15
-15
-15
-15
-15
-15
-15
S9972/S9973 series
Typ.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max.
+30
+70
+25
+18
+18
+18
+15
+15
+15
+15
+15
+15
+15
+15
Unit
°C
°C
V
V
V
V
V
V
V
V
V
V
V
V
s
Operating conditions (MPP mode, Ta=25 °C)
Parameter
Output transistor drain voltage
Reset drain voltage
Output gate voltage
Substrate voltage
Test point (vertical input source)
Test point (horizontal input source)
Test point (vertical input gate)
Test point (horizontal input gate)
Vertical shift register
clock voltage
Horizontal shift register
clock voltage
Summing gate voltage
Reset gate voltage
Transfer gate voltage
Symbol
V
OD
V
RD
V
OG
V
SS
V
ISV
V
ISH
V
IG1V
, V
IG2V
V
IG1H
, V
IG2H
V
P1VH
, V
P2VH
V
P1VL
, V
P2VL
V
P1HH
, V
P2HH
V
P1HL
, V
P2HL
V
SGH
V
SGL
V
RGH
V
RGL
V
TGH
V
TGL
Min.
18
12
-0.5
-
-
-
-8
-8
0
-9
0
-9
0
-9
0
-9
0
-9
Typ.
20
13
0
0
V
RD
V
RD
0
0
4
-8
4
-8
4
-8
4
-8
4
-8
Max.
22
14
2
-
-
-
-
-
6
-7
6
-7
6
-7
6
-7
6
-7
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
High
Low
High
Low
High
Low
High
Low
High
Low
s
Electrical characteristics (Ta=25 °C)
Parameter
Symbol
Remark
Min.
Signal output frequency
fc
-
-
S9972/S9973-1007
-
-
Vertical shift register
C
P1V
, C
P2V
capacitance
S9972/S9973-1008
-
-
Horizontal shift register capacitance
C
P1H
, C
P2H
-
-
Summing gate capacitance
C
SG
-
-
Reset gate capacitance
C
RG
-
-
Transfer gate capacitance
C
TG
-
-
2
Transfer efficiency
CTE
*
0.99995
3
DC output level
Vout
*
12
3
Output impedance
Zo
*
-
3,
*
4
Power dissipation
P
*
-
*2: Charge transfer efficiency per pixel, measured at half of the full well capacity.
*3: The values depend on the load resistance. (V
OD
=20 V, Load resistance=10 kΩ)
*4: Power dissipation of the on-chip amplifier.
Typ.
0.1
1600
3200
180
7
7
100
0.99999
15
3
15
Max.
1
Unit
MHz
pF
-
-
-
18
-
-
pF
pF
pF
pF
-
V
kΩ
mW
2
CCD area image sensor
S9972/S9973 series
s
Electrical and optical characteristics (Ta=25 °C, unless otherwise noted)
Parameter
Symbol
Remark
Min.
Typ.
Max.
Unit
Saturation output voltage
Vsat
-
-
Fw × Sv
-
V
Vertical
120
240
-
Full well
Fw
-
ke-
capacity
Horizontal
240
480
-
CCD node sensitivity
Sv
*
5
-
2.8
-
µV/e-
+25 °C
-
2000
30000
Dark current
DS
*
6
e-/pixel/s
(MPP mode)
0 °C
-
100
1500
Readout noise
Nr
*
7
-
4
18
e-rms
Line binning
13333
120000
-
Dynamic range
*
8
-
-
Area scanning
6667
60000
-
Spectral response range
-
-
400 to 1100
-
nm
λ
9
Photo response non-uniformity
PRNU
*
-
-
±10
%
10
Point defects
*
-
-
0
11
Blemish
Cluster defects
-
*
-
-
0
-
12
Column defects
*
-
-
0
*5: V
OD
=20 V , Load resistance=10 kΩ
*6: Dark current nearly doubles for every 5 to 7 °C increase in temperature.
*7: -40 °C, operating frequency is 80 kHz.
*8: DR = Fw / Nr
*9: Measured at half of the full well capacity. PRNU = noise / signal × 100 [%], noise: fixed pattern noise (peak to peak)
*10: White spots > 3 % of full well at 0 °C after Ts=1 s
Black spots
Pixels whose sensitivity is lower than one-half of the average pixel output (Measured with uniform light producing one-half
of the saturation charge)
*11: 2 to 9 contiguous defective pixels
*12: 10 or more contiguous defective pixels
s
Spectral response (without window)
50
S9970/S9971
SERIES
(Typ. Ta=25 ˚C)
S9972/S9973
SERIES
s
Spectral transmittance characteristics
100
90
80
(Typ. Ta=25 ˚C)
QUANTUM EFFICIENCY (%)
40
TRANSMITTANCE (%)
QUARTZ WINDOW
70
SAPPHIRE WINDOW
60
50
40
30
20
10
30
20
10
0
200 300 400 500 600 700 800 900 1000 1100 1200
0
100 200 300 400 500 600 700 800 900 1000
WAVELENGTH (nm)
KMPDB0257EC
WAVELENGTH (nm)
KMPDB0101EA
3
CCD area image sensor
s
Device structure, line output format
IG1V IG2V ISV
24
23 22
SS
20
TG
16
P1V
15
P2V
14
S9972/S9973 series
V
......
V=124, 252
H=1024
......
H
1
RG
RD
OS
1
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
2
3
......
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
13 ISH
12 IG1H
4
OD
5
OG
6
SG
4 BLANK
2 ISOLATION
4 OPTICAL
BLACK
9
10
11
IG2H
2 ISOLATION P2H P1H
1024
4 OPTICAL
SIGNAL OUT
4 BLANK
BLACK
KMPDC0237EA
Pixel format
Blank
4
Optical Black
4
Left
←
Horizontal Direction
→
Right
Isolation
Effective
Isolation
2
1024
2
Top
←
Vertical Direction
→
Bottom
Isolation
Effective
Isolation
2
124 or 252
2
Optical Black
4
Blank
4
s
Timing chart
Line binning
INTEGRATION PERIOD
(Shutter must be open)
Tpwv
1
P1V
P2V, TG
Tpwh, Tpws
P1H
P2H, SG
Tpwr
RG
OS
D1
D2
D19
D3..D10, S1..S1024, D11..D18
D20
1
2
3
4..1042 1043
1044: S9972/S9973-1007/-1008
2
Tovr
VERTICAL BINNING PERIOD
(Shutter must be closed)
3..126
3..254
127
255
READOUT PERIOD (Shutter must be closed)
128← 124 + 4 (ISOLATION): S9972/S9973-1007
256← 252 + 4 (ISOLATION): S9972/S9973-1008
KMPDC0238EA
4
CCD area image sensor
S9972/S9973 series
Area scanning 1: low dark current mode
INTEGRATION PERIOD
(Shutter must be open)
Tpwv
1
P1V
P2V, TG
P1H
P2H, SG
RG
OS
Tovr
P2V, TG
P1H
Tpwh, Tpws
ENLARGED VIEW
2
3
READOUT PERIOD (Shutter must be closed)
4..127 128←124 + 4 (ISOLATION): S9972/S9973-1007
4..255 256←252 + 4 (ISOLATION): S9972/S9973-1008
P2H, SG
RG
OS
Tpwr
D1
D2
D3
D4
D18
D5..D10, S1..S1024, D11..D17
D19
D20
KMPDC0239EA
Area scanning 2: large full well mode
INTEGRATION PERIOD
(Shutter must be open)
Tpwv
1
P1V
P2V, TG
P1H
P2H, SG
RG
OS
Tovr
P2V, TG
P1H
Tpwh, Tpws
ENLARGED VIEW
2
3
READOUT PERIOD (Shutter must be closed)
4..127 128←124 + 4 (ISOLATION): S9972/S9973-1007
4..255 256←252 + 4 (ISOLATION): S9972/S9973-1008
P2H, SG
RG
OS
Tpwr
D1
D2
D3
D4
D18
D5..D10, S1..S1024, D11..D17
D19
D20
KMPDC0240EA
Parameter
P1V, P2V, TG
Pulse width
S9972/S9973-1007
S9972/S9973-1008
Symbol
Tpwv
Remark
*
13
-
-
*
13
-
14
*
-
-
-
-
Rise and fall time
Tprv, Tpfv
Pulse width
Tpwh
P1H, P2H
Rise and fall time
Tprh, Tpfh
Duty ratio
-
Pulse width
Tpws
SG
Rise and fall time
Tprs, Tpfs
Duty ratio
-
Pulse width
Tpwr
RG
Rise and fall time
Tprr, Tpfr
TG - P1H
Overlap time
Tovr
*13: The clock pulses should be overlapped at 50 % of clock pulse amplitude.
*14: P2H and SG should have the same electrical specifications.
Min.
6.0
12
200
500
10
-
500
10
-
100
5
3
Typ.
18
36
-
5000
-
50
5000
-
50
500
-
6
Max.
-
-
-
-
-
-
-
-
-
-
-
-
Unit
µs
ns
ns
ns
%
ns
ns
%
ns
ns
µs
5
Embedded System
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