TC74ACT374P/F/FT
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74ACT374P,TC74ACT374F,TC74ACT374FT
Octal D-Type Flip-Flop with 3-State Output
TC74ACT374P
The TC74ACT374 is an advanced high speed CMOS OCTAL
FLIP-FLOP fabricated with silicon gate and double-layer metal
wiring C
2
MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
This devices may be used as a level converter for interfacing
TTL or NMOS to High Speed CMOS. The inputs are compatible
with TTL, NMOS and CMOS output voltage levels.
These 8-bit D-type flip-flops are controlled by a clock input
(CK) and a output enable input (
OE
).
When the
OE
input is high, the eight outputs are in a high
impedance state.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
TC74ACT374F
Features
•
•
•
•
High speed: f
max
=
180 MHz (typ.) at V
CC
=
5 V
Low power dissipation: I
CC
=
8
μA
(max) at Ta
=
25°C
Compatible with TTL outputs: V
IL
=
0.8 V (max)
V
IH
=
2.0 V (min)
Symmetrical output impedance: |I
OH
|
=
I
OL
=
24 mA (min)
Capability of driving 50
Ω
transmission lines.
∼
Balanced propagation delays: t
pLH
−
t
pHL
Pin and function compatible with 74F374
Weight
DIP20-P-300-2.54A
SOP20-P-300-1.27A
TSSOP20-P-0044-0.65A
: 1.30 g (typ.)
: 0.22 g (typ.)
: 0.08 g (typ.)
TC74ACT374FT
•
•
1
2007-10-01
TC74ACT374P/F/FT
Pin Assignment
IEC Logic Symbol
OE
CK
(1)
(11)
EN
C1
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
(top view)
V
CC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CK
D0
D1
D2
D3
D4
D5
D6
D7
(3)
(4)
(7)
(8)
(13)
(14)
(17)
(18)
1D
(2)
(5)
(6)
(9)
(12)
(15)
(16)
(19)
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
GND 10
Truth Table
Inputs
OE
Output
D
X
X
L
H
Q
Z
Q
n
L
H
CK
X
H
L
L
L
X: Don’t care
Z: High impedance
Q
n
: No change
System Diagram
D0
3
D
D1
4
D
D2
7
D
D3
8
D
D4
13
D
D5
14
D
D6
17
D
D7
18
D
Q
CK
11
CK
CK
Q
CK
Q
CK
Q
CK
Q
CK
Q
CK
Q
CK
Q
OE
1
2
Q0
5
Q1
6
Q2
9
Q3
12
Q4
15
Q5
16
Q6
19
Q7
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2007-10-01
TC74ACT374P/F/FT
Absolute Maximum Ratings (Note 1)
Characteristics
Supply voltage range
DC input voltage
DC output voltage
Input diode current
Output diode current
DC output current
DC V
CC
/ground current
Power dissipation
Storage temperature
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
stg
Rating
−0.5
to 7.0
−0.5
to V
CC
+ 0.5
−0.5
to V
CC
+ 0.5
±20
±50
±50
±200
500 (DIP) (Note 2)/180 (SOP/TSSOP)
−65
to 150
Unit
V
V
V
mA
mA
mA
mA
mW
°C
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta =
−40
to 65°C. From Ta = 65 to 85°C a derating factor of
−10
mW/°C should be
applied up to 300 mW.
Operating Ranges (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Operating temperature
Input rise and fall time
Symbol
V
CC
V
IN
V
OUT
T
opr
dt/dV
Rating
4.5 to 5.5
0 to V
CC
0 to V
CC
−40
to 85
0 to 10
Unit
V
V
V
°C
ns/V
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
3
2007-10-01
TC74ACT374P/F/FT
Electrical Characteristics
DC Characteristics
Test Condition
Characteristics
Symbol
V
CC
(V)
―
4.5
to
5.5
4.5
to
5.5
4.5
4.5
(Note)
5.5
4.5
4.5
(Note)
5.5
5.5
5.5
5.5
5.5
Min
2.0
Ta = 25°C
Typ.
―
Max
―
Ta =
−40
to 85°C
Min
2.0
Max
―
V
Unit
High-level input
voltage
Low-level input
voltage
V
IH
V
IL
―
I
OH
=
−50 μA
V
IN
= V
IH
or I
OH
=
−24
mA
V
IL
I
OH
=
−75
mA
I
OL
= 50
μA
V
IN
= V
IH
or I
OL
= 24 mA
V
IL
I
OL
= 75 mA
V
IN
= V
IH
or V
IL
V
OUT
= V
CC
or GND
V
IN
= V
CC
or GND
V
IN
= V
CC
or GND
Per input: V
IN
= 3.4 V
Other input: V
CC
or GND
―
4.4
3.94
―
―
―
―
―
―
―
―
―
4.5
―
―
0.0
―
―
―
―
―
―
0.8
―
―
―
0.1
0.36
―
±0.5
±0.1
8.0
1.35
―
4.4
3.80
3.85
―
―
―
―
―
―
―
0.8
―
―
―
0.1
0.44
1.65
±5.0
±1.0
80.0
1.5
V
High-level output
voltage
V
OH
V
Low-level output
voltage
V
OL
V
3-state output
off-state current
Input leakage
current
Quiescent supply
current
I
OZ
I
IN
I
CC
I
C
μA
μA
μA
mA
Note:
This spec indicates the capability of driving 50
Ω
transmission lines.
One output should be tested at a time for a 10 ms maximum duration.
Timing Requirements
(input: t
r
= t
f
= 3 ns)
Characteristics
Symbol
Test Condition
V
CC
(V)
Minimum pulse width
(CK)
Minimum set-up time
Minimum hold time
t
w (H)
t
w (L)
t
s
t
h
―
―
―
5.0 ± 0.5
5.0 ± 0.5
5.0 ± 0.5
Ta =
25°C
Limit
5.0
3.0
2.0
Ta =
−40
to
85°C
Limit
5.0
3.0
2.0
ns
ns
ns
Unit
4
2007-10-01
TC74ACT374P/F/FT
AC Characteristics
(C
L
= 50 pF, R
L
= 500
Ω,
input: t
r
= t
f
= 3 ns)
Characteristics
Propagation delay
time
(CK-Q)
Output enable time
Symbol
Test Condition
V
CC
(V)
t
pLH
t
pHL
t
pZL
t
pZH
t
pLZ
t
pHZ
f
max
C
IN
C
OUT
C
PD
―
5.0 ± 0.5
Min
―
Ta = 25°C
Typ.
6.1
Max
9.6
Ta =
−40
to 85°C
Min
1.0
Max
11.0
ns
Unit
―
5.0 ± 0.5
―
6.2
10.1
1.0
11.5
ns
Output disable time
Maximum clock
frequency
Input capacitance
Output capacitance
Power dissipation
capacitance
―
―
―
―
5.0 ± 0.5
5.0 ± 0.5
―
95
―
―
5.6
160
5
10
34
7.9
―
10
―
―
1.0
95
―
―
―
9.0
―
10
―
―
ns
MHz
pF
pF
pF
(Note)
―
Note:
C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
I
CC (opr)
= C
PD
·V
CC
·f
IN
+ I
CC
/8 (per F/F)
And the total C
PD
when n pcs. of F/F operate can be gained by the following equation:
C
PD
(total) = 22 + 12·n
5
2007-10-01
MCU
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