FPGA - Field Programmable Gate Array 1280 LUTs 105 I/O 1.2V -1 SPD
| Parameter Name | Attribute value |
| Is it lead-free? | Lead free |
| Is it Rohs certified? | conform to |
| Maker | Lattice |
| Parts packaging code | BGA |
| package instruction | BGA, BGA132,14X14,20 |
| Contacts | 132 |
| Reach Compliance Code | compliant |
| ECCN code | EAR99 |
| maximum clock frequency | 133 MHz |
| JESD-30 code | S-PBGA-B132 |
| JESD-609 code | e1 |
| Humidity sensitivity level | 3 |
| Number of entries | 105 |
| Number of logical units | 1280 |
| Output times | 105 |
| Number of terminals | 132 |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | BGA |
| Encapsulate equivalent code | BGA132,14X14,20 |
| Package shape | SQUARE |
| Package form | GRID ARRAY |
| Peak Reflow Temperature (Celsius) | 260 |
| power supply | 1.2 V |
| Programmable logic type | FIELD PROGRAMMABLE GATE ARRAY |
| Certification status | Not Qualified |
| Maximum supply voltage | 1.26 V |
| Minimum supply voltage | 1.14 V |
| Nominal supply voltage | 1.2 V |
| surface mount | YES |
| technology | CMOS |
| Terminal surface | Tin/Silver/Copper (Sn/Ag/Cu) |
| Terminal form | BALL |
| Terminal pitch | 0.5 mm |
| Terminal location | BOTTOM |
| Maximum time at peak reflow temperature | 30 |
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