74LVX125MTR datasheet, PDF - EEWORLD Datasheet

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74LVX125MTR: DescriptionBuffers & Line Drivers Quad Bus Buffer; Categorylogic logic; File Size149KB，12 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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74LVX125MTR Overview

Buffers & Line Drivers Quad Bus Buffer

74LVX125MTR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	STMicroelectronics
Parts packaging code	SOIC
package instruction	SOP, SOP14,.25
Contacts	14
Reach Compliance Code	compliant
Factory Lead Time	16 weeks
Control type	ENABLE LOW
series	LV/LV-A/LVX/H
JESD-30 code	R-PDSO-G14
JESD-609 code	e4
length	8.65 mm
Logic integrated circuit type	BUS DRIVER
MaximumI(ol)	0.004 A
Humidity sensitivity level	1
Number of digits	1
Number of functions	4
Number of ports	2
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP14,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Prop。Delay @ Nom-Sup	13 ns
propagation delay (tpd)	18 ns
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	2.7 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
width	3.9 mm
Base Number Matches	1

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74LVX125

LOW VOLTAGE QUAD BUS BUFFERS (3-STATE)

WITH 5V TOLERANT INPUTS

HIGH SPEED: t

=4.4ns (TYP.) at V

= 3.3V

5V TOLERANT INPUTS

POWER-DOWN PROTECTION ON INPUTS

INPUT VOLTAGE LEVEL:

= 0.8V, V

= 2V at V

=3V

LOW POWER DISSIPATION:

= 2

µA

(MAX.) at T

=25°C

LOW NOISE:

OLP

= 0.3V (TYP.) at V

=3.3V

SYMMETRICAL OUTPUT IMPEDANCE:

| = I

= 4 mA (MIN) at V

=3V

BALANCED PROPAGATION DELAYS:

PLH

≅

PHL

OPERATING VOLTAGE RANGE:

(OPR) = 2V to 3.6V (1.2V Data Retention)

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 125

IMPROVED LATCH-UP IMMUNITY

SOP

TSSOP

Table 1: Order Codes

PACKAGE

SOP

TSSOP

T&R

74LVX125MTR

74LVX125TTR

DESCRIPTION

The 74LVX125 is a low voltage CMOS QUAD

BUS BUFFERs fabricated with sub-micron silicon

gate and double-layer metal wiring C

MOS

technology. It is ideal for low power, battery

operated and low noise 3.3V applications.

Figure 1: Pin Connection And IEC Logic Symbols

This device requires the 3-STATE control input G

to be set high to place the output into the high

impedance state.

Power down protection is provided on all inputs

and 0 to 7V can be accepted on inputs with no

regard to the supply voltage. This device can be

used to interface 5V to 3V. It combines high speed

performance with the true CMOS low power

consumption.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

August 2004

Rev. 3

1/12

74LVX125MTR Related Products

	74LVX125MTR	74LVX125TTR
Description	Buffers & Line Drivers Quad Bus Buffer	Buffers & Line Drivers Quad Bus Buffer
Is it lead-free?	Lead free	Lead free
Is it Rohs certified?	conform to	conform to
Maker	STMicroelectronics	STMicroelectronics
Parts packaging code	SOIC	TSSOP
package instruction	SOP, SOP14,.25	TSSOP, TSSOP14,.25
Contacts	14	14
Reach Compliance Code	compliant	compliant
Control type	ENABLE LOW	ENABLE LOW
series	LV/LV-A/LVX/H	LV/LV-A/LVX/H
JESD-30 code	R-PDSO-G14	R-PDSO-G14
JESD-609 code	e4	e4
length	8.65 mm	5 mm
Logic integrated circuit type	BUS DRIVER	BUS DRIVER
MaximumI(ol)	0.004 A	0.004 A
Number of digits	1	1
Number of functions	4	4
Number of ports	2	2
Number of terminals	14	14
Maximum operating temperature	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C
Output characteristics	3-STATE	3-STATE
Output polarity	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	TSSOP
Encapsulate equivalent code	SOP14,.25	TSSOP14,.25
Package shape	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing	TAPE AND REEL	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260	NOT SPECIFIED
power supply	3.3 V	3.3 V
Prop。Delay @ Nom-Sup	13 ns	13 ns
propagation delay (tpd)	18 ns	18 ns
Certification status	Not Qualified	Not Qualified
Maximum seat height	1.75 mm	1.2 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V
Minimum supply voltage (Vsup)	2 V	2 V
Nominal supply voltage (Vsup)	2.7 V	2.7 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	MILITARY	MILITARY
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING	GULL WING
Terminal pitch	1.27 mm	0.65 mm
Terminal location	DUAL	DUAL
Maximum time at peak reflow temperature	40	NOT SPECIFIED
width	3.9 mm	4.4 mm
Base Number Matches	1	1

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