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81006AKLFT

Description
Clock Generators & Support Products 6 CMOS OUT VCXO
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size353KB,18 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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81006AKLFT Overview

Clock Generators & Support Products 6 CMOS OUT VCXO

81006AKLFT Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeVFQFPN
package instructionVFQFN-20
Contacts20
Manufacturer packaging codeNLG20P1
Reach Compliance Codecompliant
ECCN codeEAR99
Other featuresALSO OPERATES AT 3.3V SUPPLY
JESD-30 codeS-XQCC-N20
JESD-609 codee3
length4 mm
Humidity sensitivity level1
Number of terminals20
Maximum operating temperature70 °C
Minimum operating temperature
Maximum output clock frequency40 MHz
Package body materialUNSPECIFIED
encapsulated codeVQCCN
Encapsulate equivalent codeLCC20,.16SQ,20
Package shapeSQUARE
Package formCHIP CARRIER, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
power supply2.5/3.3 V
Master clock/crystal nominal frequency19.44 MHz
Certification statusNot Qualified
Maximum seat height1 mm
Maximum slew rate50 mA
Maximum supply voltage2.625 V
Minimum supply voltage2.375 V
Nominal supply voltage2.5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width4 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER
Base Number Matches1
VCXO-To-6 LVCMOS Outputs
81006
OBSOLETE
DATA SHEET
General Description
The 81006 is a high performance, low jitter/ low phase noise VCXO.
The 81006 works in conjunction with a pullable crystal to generate an
output clock over the range of 12MHz – 31.25MHz and has 6
LVCMOS outputs, effectively integrating a fanout buffer function.
The frequency of the VCXO is adjusted by the VC control voltage
input. The output range is ±100ppm around the nominal crystal
frequency. The VC control voltage range is 0 – V
DD
. The device is
packaged in a small 4mm x 4mm VFQFN package and is ideal for use
on space constrained boards typically encountered in ADSL/VDSL
applications.
Features
• Six LVCMOS/LVTTL outputs, 20 nominal output impedance
• Output Q5 can be selected for ÷1 or ÷2 frequency relative to the
crystal frequency
• Output frequency range: 12MHz to 31.25MHz
• Crystal pull range: ±90ppm (typical)
• Synchronous output enable places outputs in High-
Impedance state
• On-chip filter on VIN to suppress noise modulation of VCXO
• V
DD
/V
DDO
combinations
3.3V/3.3V
3.3V/2.5V
3.3V/1.8V
2.5V/2.5V
2.5V/1.8V
• 4mm x 4mm 20-Lead VFQFN package is ideal for space
constrained designs
• 0°C to 70°C ambient operating temperature
• Lead-free (RoHS 6) packaging
Block Diagram
OE0
Pullup
Pin Assignment
GND
Q0
Q1
SYNC
Q0
XTAL_IN
XTAL_OUT
V
DD
Q1
1
2
3
4
5
VC
LP Filter
20 19 18 17 16
15
14
13
12
6
OE1
V
DDO
OE0
GND
Q2
V
DDO
Q3
GND
XTAL_IN
VC
DIV_SEL_Q5
VCXO
Q2
XTAL_OUT
Q3
7
GND
8
Q5
9
V
DDO
11
10
Q4
81006
20-Lead VFQFN
4mm x 4mm x 0.925 package body
K Package
Top View
Q4
0: ÷1
1: ÷2
DIV_SEL_Q5
Pulldown
Q5
OE1
Pullup
SYNC
81006 REVISION B 7/29/16
1
©2016 Integrated Device Technology, Inc.

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