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HD75160AP

Description
Octal General Purpose Interface Bus Transceivers
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size159KB,13 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Download Datasheet Parametric Compare View All

HD75160AP Overview

Octal General Purpose Interface Bus Transceivers

HD75160AP Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerRenesas Electronics Corporation
Parts packaging codeDIP
package instructionDIP,
Contacts20
Reach Compliance Codeunknow
ECCN codeEAR99
Differential outputNO
Number of drives8
Input propertiesSCHMITT TRIGGER
Interface integrated circuit typeLINE TRANSCEIVER
Interface standardsIEEE-488
JESD-30 codeR-PDIP-T20
JESD-609 codee0
length24.5 mm
Number of functions8
Number of terminals20
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum receive delay22 ns
Number of receiver bits8
Maximum seat height5.08 mm
Maximum supply voltage5.25 V
Minimum supply voltage4.75 V
Nominal supply voltage5 V
surface mountNO
Temperature levelCOMMERCIAL
Terminal surfaceTIN LEAD
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
maximum transmission delay20 ns
width7.62 mm
HD75160A
Octal General Purpose Interface Bus Transceivers
REJ03D0308–0200Z
(Previous ADE-205-590 (Z))
Rev.2.00
Jul.16.2004
Description
The HD75160A is an 8 channel general purpose interface bus transceiver designed to meet the requirements of IEEE
standard 488-1978. The transceiver features driver outputs which can handle loads up to 48 mA of sink current if talk
Enable(TE) is high, the ports have the characteristics of open collector outputs when pull up enable(PE) is low, and of
three state outputs when PE is high. Taking TE low places the ports in the high impedance state. The device exhibits a
high impedance to the bus when V
CC
= 0 V since the bus terminating resistors are built in when combined with the
HD75161A mangement bus transceivers, the pair provides the complete 16 wire interface for the IEEE-488 bus.
Features
Ordering Information
Part Name
HD75160AP
Package Type
DILP-20 pin
Package Code
DP-20N, -20NEV
P
Package
Abbreviation
Taping Abbreviation
(Quantity)
Pin Arrangement
TE 1
B1 2
B2 3
GPIB I/O PORTS
B3 4
B4 5
B5 6
B6 7
B7 8
B8 9
GND 10
20 V
CC
19 D1
18 D2
17 D3
16 D4
15 D5
14 D6
13 D7
12 D8
11 PE
TERMINAL I/O PORTS
(Top view)
Rev.2.00, Jul.16.2004, page 1 of 12

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