54RHSC109FD datasheet, PDF - EEWORLD Datasheet

54RHSC109FD: DescriptionJ-Kbar Flip-Flop, HSC Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, CDFP16; Categorylogic; File Size2MB，84 Pages; ManufacturerDynex; Websitehttp://www.dynexsemi.com/

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54RHSC109FD Overview

J-Kbar Flip-Flop, HSC Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, CDFP16

Parameter Name	Attribute value
Maker	Dynex
package instruction	,
Reach Compliance Code	unknown
Is Samacsys	N
Other features	RADIATION HARD CMOS/SILICON ON SAPPHIRE (SOS) TECHNOLOGY
series	HSC
JESD-30 code	R-CDFP-F16
Load capacitance (CL)	50 pF
Logic integrated circuit type	J-KBAR FLIP-FLOP
Number of digits	2
Number of functions	2
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output polarity	COMPLEMENTARY
Package body material	CERAMIC, METAL-SEALED COFIRED
Package shape	RECTANGULAR
Package form	FLATPACK
propagation delay (tpd)	25 ns
Certification status	Not Qualified
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal form	FLAT
Terminal location	DUAL
Trigger type	POSITIVE EDGE
Base Number Matches	1

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