Data Sheet
FEATURES
Differential Input, Dual, Simultaneous
Sampling, 5 MSPS, 12-Bit, SAR ADC
AD7356
FUNCTIONAL BLOCK DIAGRAM
V
DD
V
DRIVE
Dual 12-bit SAR ADC
Simultaneous sampling
Throughput rate: 5 MSPS per channel
Specified for V
DD
at 2.5 V
No conversion latency
Power dissipation: 36 mW at 5 MSPS
On-chip reference: 2.048 V ± 0.25%, 6 ppm/°C
Dual conversion with read
High speed serial interface: SPI-/QSPI™-/MICROWIRE™-/DSP-
compatible
−40°C to +125°C operation
Available in a 16-lead TSSOP
AD7356
V
INA+
V
INA–
REF
A
T/H
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
SDATA
A
BUF
REF
BUF
CONTROL
LOGIC
SCLK
CS
APPLICATIONS
Data acquisition systems
Motion control
I and Q demodulation
REF
B
V
INB+
V
INB–
T/H
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
SDATA
B
06505-001
AGND
AGND
REFGND
DGND
Figure 1.
GENERAL DESCRIPTION
The
AD7356
1
is a dual, 12-bit, high speed, low power, successive
approximation ADC that operates from a single 2.5 V power
supply and features throughput rates up to 5 MSPS. The device
contains two ADCs, each preceded by a low noise, wide bandwidth
track-and-hold circuit that can handle input frequencies in excess
of 110 MHz.
The conversion process and data acquisition use standard control
inputs allowing for easy interfacing to microprocessors or DSPs.
The input signal is sampled on the falling edge of CS; a conversion
is also initiated at this point. The conversion time is determined
by the SCLK frequency.
The
AD7356
uses advanced design techniques to achieve very
low power dissipation at high throughput rates. With a 2.5 V
supply and a 5 MSPS throughput rate, the part consumes typically
14 mA. The part also offers a flexible power/throughput rate
management option.
The analog input range for the part is the differential common
mode ±V
REF
/2. The
AD7356
has an on-chip 2.048 V reference
that can be overdriven when an external reference is preferred.
The
AD7356
is available in a 16-lead thin shrink small outline
package (TSSOP).
PRODUCT HIGHLIGHTS
1.
Two Complete ADC Functions.
These functions allow simultaneous sampling and conversion
of two channels. The conversion result of both channels
is simultaneously available on separate data lines or in
succession on one data line if only one serial port is
available.
High Throughput with Low Power Consumption.
The
AD7356
offers a 5 MSPS throughput rate with 36 mW
power consumption.
No Conversion Latency.
The
AD7356
features two standard successive approximation
ADCs with accurate control of the sampling instant via a
CS input and, once off, conversion control.
2.
3.
Table 1. Related Devices
Generic
AD7352
AD7357
AD7266
AD7866
AD7366
AD7367
Resolution
12-bit
14-bit
12-bit
12-bit
12-bit
14-bit
Throughput
3 MSPS
4.25 MSPS
2 MSPS
1 MSPS
1 MSPS
1 MSPS
Analog Input
Differential
Differential
Differential/single ended
Single-ended
Single-ended bipolar
Single-ended bipolar
1
Protected by U.S. Patent No. 6,681,332.
Document Feedback
Rev. B
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,
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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Technical Support
www.analog.com
AD7356
TABLE OF CONTENTS
Features........................................................................................... 1
Applications ................................................................................... 1
Functional Block Diagram............................................................ 1
General Description ...................................................................... 1
Product Highlights ........................................................................ 1
Revision History ............................................................................ 2
Specifications ................................................................................. 3
Timing Specifications................................................................ 5
Absolute Maximum Ratings ......................................................... 6
ESD Caution............................................................................... 6
Pin Configuration and Function Descriptions............................ 7
Typical Performance Characteristics............................................ 8
Terminology................................................................................. 10
Theory of Operation.................................................................... 12
Circuit Information ................................................................. 12
Converter Operation............................................................... 12
Analog Input Structure............................................................ 12
Data Sheet
Analog Inputs........................................................................... 13
Driving Differential Inputs ..................................................... 13
Voltage Reference..................................................................... 14
ADC Transfer Function .......................................................... 14
Modes of Operation..................................................................... 15
Normal Mode........................................................................... 15
Partial Power-Down Mode ..................................................... 15
Full Power-Down Mode .......................................................... 16
Power-Up Times...................................................................... 17
Power vs. Throughput Rate..................................................... 17
Serial Interface ............................................................................. 18
Application Hints......................................................................... 19
Grounding and Layout............................................................ 19
Evaluating the AD7356 Performance..................................... 19
Outline Dimensions .................................................................... 20
Ordering Guide........................................................................ 20
REVISION HISTORY
8/15—Rev. A to Rev. B
Changes to Figure 20....................................................................14
8/11—Rev. 0 to Rev. A
Added Applications Section...........................................................1
Changes to Table 1..........................................................................1
Changes to Figure 21 and Figure 22............................................14
Added Voltage Reference Section................................................14
Updated Outline Dimensions......................................................20
10/08—Revision 0: Initial Version
Rev. B | Page 2 of 20
Data Sheet
SPECIFICATIONS
AD7356
V
DD
= 2.5 V ± 10%, V
DRIVE
= 2.25 V to 3.6 V, internal reference = 2.048 V, f
SCLK
= 80 MHz, f
SAMPLE
= 5 MSPS, T
A
= T
MIN
to T
MAX 1
, unless
otherwise noted.
Table 2.
Parameter
DYNAMIC PERFORMANCE
Signal-to-Noise Ratio (SNR)
2
Signal-to-(Noise and Distortion) (SINAD)
2
Total Harmonic Distortion (THD)
2
Spurious Free Dynamic Range (SFDR)
2
Intermodulation Distortion (IMD)
2
Second-Order Terms
Third-Order Terms
ADC-to-ADC Isolation
2
CMRR
2
SAMPLE AND HOLD
Aperture Delay
Aperture Delay Match
Aperture Jitter
Full Power Bandwidth
At 3 dB
At 0.1 dB
DC ACCURACY
Resolution
Integral Nonlinearity (INL)
2
Differential Nonlinearity (DNL)
2
Positive Full-Scale Error
2
Positive Full-Scale Error Match
2
Midscale Error
2
Midscale Error Match
2
Negative Full-Scale Error
2
Negative Full-Scale Error Match
2
ANALOG INPUT
Fully Differential Input Range (V
IN+
and V
IN−
)
Common-Mode Voltage Range
DC Leakage Current
Input Capacitance
REFERENCE INPUT/OUTPUT
V
REF
Input Voltage Range
V
REF
Input Current
V
REF
Output Voltage
Min
70
69.5
Typ
71.5
71
−84
−85
−84
−76
−100
−100
3.5
40
16
110
77
12
±0.5
±0.5
±1
±2
+5
±2
±1
±2
±1
±0.99
±6
±8
0/+11
±8
±6
±8
V
CM
± V
REF
/2
0.5
±0.5
32
8
2.048 + 0.1
0.3
2.038
2.043
V
REF
Temperature Coefficient
V
REF
Long Term Stability
V
REF
Thermal Hysteresis
2
V
REF
Noise
V
REF
Output Impedance
6
100
50
60
1
1.9
±5
Max
Unit
dB
dB
dB
dB
fa = 1 MHz + 50 kHz, fb = 1 MHz − 50 KHz
dB
dB
dB
dB
ns
ps
ps
MHz
MHz
Bits
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
V
V
μA
pF
pF
V
mA
V
V
ppm/°C
ppm
ppm
μV rms
Ω
Test Conditions/Comments
f
IN
= 1 MHz sine wave
−77.5
−78.5
f
IN
= 1 MHz, f
NOISE
= 100 kHz to 2.5 MHz
f
NOISE
= 100 kHz to 2.5 MHz
Guaranteed no missed codes to 12 bits
V
CM
= common-mode voltage, V
IN+
and
V
IN−
must remain within GND and V
DD
The voltage around which V
IN+
and V
IN−
are
centered
When in track mode
When in hold mode
V
DD
0.45
2.058
2.053
20
When in reference overdrive mode
2.048 V ± 0.5% maximum at
V
DD
= 2.5 V ± 5%
2.048 V ± 0.25% maximum at
V
DD
= 2.5 V ± 5% and 25°C
For 1000 hours
Rev. B | Page 3 of 20
AD7356
Parameter
LOGIC INPUTS
Input High Voltage (V
INH
)
Input Low Voltage (V
INL
)
Input Current (I
IN)
)
Input Capacitance (C
IN
)
LOGIC OUTPUTS
Output High Voltage (V
OH
)
Output Low Voltage (V
OL
)
Floating-State Leakage Current
Floating-State Output Capacitance
Output Coding
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time
2
Throughput Rate
POWER REQUIREMENTS
3
V
DD
V
DRIVE
I
TOTAL 4
Normal Mode (Operational)
Normal Mode (Static)
Partial Power-Down Mode
Full Power-Down Mode
Power Dissipation
Normal Mode (Operational)
Normal Mode (Static)
Partial Power-Down Mode
Full Power-Down Mode
1
2
Data Sheet
Min
0.6 × V
DRIVE
0.3 × V
DRIVE
±1
3
V
DRIVE
− 0.2
0.2
±1
5.5
Straight binary
t
2
+ 13 × t
SCLK
30
5
2.25
2.25
14
6
3.5
5
2.75
3.6
20
7.8
4.5
40
90
59
21.5
11.5
110
250
Typ
Max
Unit
V
V
μA
pF
V
V
μA
pF
Test Conditions/Comments
V
IN
= 0 V or V
DRIVE
ns
ns
MSPS
V
V
mA
mA
mA
μA
μA
mW
mW
mW
μW
μW
Full-scale step input, settling to 0.5 LSBs
Nominal V
DD
= 2.5 V
Digital inputs = 0 V or V
DRIVE
SCLK on or off
SCLK on or off
SCLK on or off, −40°C to +85°C
SCLK on or off, 85°C to 125°C
36
16
9.5
16
SCLK on or off
SCLK on or off
SCLK on or off, −40°C to +85°C
SCLK on or off, 85°C to 125°C
Temperature ranges are as follows: Y Grade: −40°C to +125°C; B Grade: −40°C to +85°C.
See the Terminology section.
3
Current and power typical specifications are based on results with V
DD
= 2.5 V and V
DRIVE
= 3.0 V.
4
I
TOTAL
is the total current flowing in V
DD
and V
DRIVE
.
Rev. B | Page 4 of 20
Data Sheet
TIMING SPECIFICATIONS
V
DD
= 2.5 V ± 10%, V
DRIVE
= 2.25 V to 3.6 V, internal reference = 2.048 V, T
A
= T
MAX
to T
MIN 1
, unless otherwise noted.
Table 3.
Parameter
f
SCLK
t
CONVERT
t
QUIET
t
2
t
3 2
t
4 2, 3
Limit at T
M I N
, T
MAX
50
80
t
2
+ 13 × t
SCLK
5
5
6
12.5
11
9.5
9
5
5
3.5
9.5
5
4.5
9.5
Unit
kHz min
MHz max
ns max
ns min
ns min
ns max
ns max
ns max
ns max
ns max
ns min
ns min
ns min
ns max
ns min
ns min
ns max
Description
AD7356
t
SCLK
= 1/f
SCLK
Minimum time between end of serial read and next falling edge of CS
CS to SCLK setup time
Delay from CS until SDATA
A
and SDATA
B
are three-state disabled
Data access time after SCLK falling edge
1.8 V ≤ V
DRIVE
< 2.25 V
2.25 V ≤ V
DRIVE
< 2.75 V
2.75 V ≤ V
DRIVE
< 3.3 V
3.3 V ≤ V
DRIVE
≤ 3.6 V
SCLK low pulse width
SCLK high pulse width
SCLK to data valid hold time
CS rising edge to SDATA
A
, SDATA
B
high impedance
CS rising edge to falling edge pulse width
SCLK falling edge to SDATA
A
, SDATA
B
high impedance
SCLK falling edge to SDATA
A
, SDATA
B
high impedance
t
5
t
6
t
7 2
t
8 2
t
9
t
10 2
1
2
Temperature ranges are as follows: Y Grade: −40°C to +125°C; B Grade: −40°C to +85°C.
Specified with a load capacitance of 10 pF on SDATA
A
and SDATA
B
.
3
The time required for the output to cross 0.4 V or 2.4 V.
Rev. B | Page 5 of 20
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