A Maxim Integrated Products Brand
PHY1097-03
2.5Gbps High Sensitivity Transimpedance Amplifier
Features
Description
•
•
•
•
-29dBm Sensitivity
Up to 2.5Gbps (NRZ) data rates
150nA rms typical input referred noise
Automatic gain control of output over full input
range
•
Flexible bond pad layout and output signal
inversion for simple ROSA layout
•
Received Signal Strength Indicator output
•
-40 to +95°C operating temperature range
The PHY1097 is a transimpedance amplifier
designed for use within small form factor fibre
optic modules targeted at Gigabit capable
Passive Optical Network (GPON) applications.
Working from a 3.3V power supply the PHY1097
integrates a low noise transimpedance amplifier,
with a typical differential transimpedance of
25kΩ, an AGC and an output stage.
The RSSI pad can be used to implement a signal
strength monitor circuit. This is designed to sink
or source a current equal to the photodiode
current for ease of interfacing.
Sensitivity of -29dBm can be achieved at
2.5Gbps.
The PHY1097 is available in die form for
mounting on a header to create a ROSA when
combined with suitable optics and photo-detector
diode.
Applications
•
Telecom Infrastructure OC48
•
GPON Optical Network Unit (ONU)
•
2.5GEPON
VCC
Voltage
Regulator
50Ω
Signal Detect
& DC Restore
50Ω
PDC
1/2
PDA
GND
R
F
Amplifier
AGC
Amp
O/P
Buffer
RX+
RX-
Signal
Strength
Indicator
RSSI_DIR
RSSI
AGC
DATA_INVERT
Figure 1: Outline block diagram
Figure 2: Device pad layout
PHY1097-03-RD-1.5
Datasheet
Page 1
1 Ordering Information
Part Number
PHY1097-03DS-WR
PHY1097-03DS-FR
PHY1097-03DS-QR
2.5G TIA
2.5G TIA
2.5G TIA
Description
Package
Bare die in waffle pack
Film on 10” wafer ring
Film on quarter 8” wafer ring
2 Pad Description
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Name
GND
1
PDC
1
PDA
PDC
2
GND
2
RSSI
VCC
1
VCC
2
RX-
GND
3
GND
4
GND
5
DATA_INVERT
GND
6
GND
7
GND
8
RX+
AGC
VCC
3
VCC
4
RSSI_DIR
Type
PWR
Analog
Analog
Analog
PWR
Analog Out
PWR
PWR
Analog Out
GND
GND
GND
Analog
Input
GND
GND
GND
Analog Out
Analog
PWR
PWR
Analog
Input
Description
Connect to Analog Ground
Regulated Power supply to Photodiode Cathode
Connect to Photodiode anode, input to TIA stage
Regulated Power supply to Photodiode Cathode
Connect to Analog Ground
Received Signal Strength output. Sources current equal to
PD current
3.3 Volt Power supply connection
3.3 Volt Power supply connection
Differential Analog Output pair with RX+
Connect to Analog Ground
Connect to Analog Ground
Connect to Analog Ground
Inverts polarity of data output pins RX+ and RX-
Connect to Analog Ground
Connect to Analog Ground
Connect to Analog Ground
Differential Analog Output pair with RX-
Disables AGC amplifier function when connected to GND
3.3 Volt Power supply connection
3.3 Volt Power supply connection
Selects whether RSSI output is a current sink or source.
Open circuit is a current sink, connect to Ground for current
source
PHY1097-03-RD-1.5
Datasheet
Page 2
3 Device Specifications
3.1 Absolute Maximum Ratings
Exceeding these limits may cause permanent damage. Correct operation under these conditions is not
implied. Extended periods of operation under these conditions may affect device reliability.
Parameter
Supply voltage
Maximum Voltage on signal pins
Device Operating Temperature
Storage Temperature
Die Attach Temperature
PDA Input Current
PDA Input current
ESD Performance
For a maximum 30 secs
VCC > 3.0V
VCC < 3.0V
Human Body Model (Excluding PDA pin)
Human Body Model (PDA pin)
2.0
0.5
Vcc within the maximum rating conditions
Measured on Die
-55
Conditions
Min
-0.5
-0.5
Max
4.0
Vcc + 0.5V
+115
150
400
3.0
2.0
Unit
V
V
°C
°C
°C
mA
mA
kV
kV
3.2 Recommended Operating Conditions
Parameter
Supply voltage
Current consumption
Ambient Operating temperature
Photodiode Capacitance
Photodiode bias voltage 1.8V
Including output termination
Conditions
Min
3.0
40
-40
3.3
48
Max
3.6
60
95
1.0
Unit
V
mA
°C
pF
3.3 Parametric Performance
All typical parameters are tested at 25°C and at VCC = 3.3V
Parameter
High-speed data input rate
Sensitivity
Input referred noise
Small Signal Bandwidth (-3dB)
Low frequency cut-off
Gain Variation with Frequency
Differential Output Swing
1
Conditions
C
IN
= 0.5pF
C
IN
= 0.5pF, Responsivity = 0.9A/W,
BER = 10 , ER = 10dB
C
IN
= 0.5pF, Measured into a 1.866GHz, 4
order Bessel filter.
th
-10
Min
Typ
Max
2.5
Unit
Gbps
dBm
-29
150
1400
1700
25
±2
320
400
480
35
200
nA rms
MHz
kHz
dB
mVp-p
Cpd = 0.35pF, -3dB point at -27dBm,
Guaranteed by characterization of reference
ROSA assemblies.
Relative to 100MHz
1MHz to 1250MHz, with respect to 100MHz
Input current < 500µA pp
Input current > 16µA pp
100Ω differential load, 2.5Gbps
PHY1097-03-RD-1.5
Datasheet
Page 3
Parameter
Transimpedance (differential)
Deterministic Jitter
Overshoot
Undershoot
Input Overload, a.c.
Input Overload d.c.
AGC settling time
Output resistance
Output Common Mode Voltage
Photodiode Cathode Voltage
Photodiode Anode Voltage
RSSI Current Accuracy
RSSI Compliance Voltage
Power Supply Rejection Ratio
K28.5 Pattern
Conditions
Input current <8µAp-p, 100Ω load
Min
20k
Typ
25k
50
Max
30k
100
±15
±15
Unit
Ω
mUIp-p
%
%
mApp
mA
2 -1PRBS (wrt to average 0/1 level)
2 -1PRBS (wrt average 0/1 level)
DJ within spec, ER =
∞
DJ within spec, TJ = 95°C
4.4
2.2
7
7
50
Differential VOUT+ to VOUT-
Measured relative to VCC
80
-0.5
2.5
100
-0.37
2.6
0.8
Measured relative to photodiode current
Current source mode
Current sink mode
100kHz – 4MHz
30
40
1.0
0.8
120
-0.25
2.7
1.0
±20
µs
Ω
V
V
V
%
V
V
dB
4 Device Description
The PHY1097 implements a complete analog front end, converting the photo-detector current, which has
been modulated by light from an optical fibre, to a differential analog voltage signal.
The PHY1097 also provides a filtered bias current to the photo-detector to increase the level of component
integration as well as the signal processing functions.
4.1 Photodiode Connection
A PIN Photodiode should be connected to the PHY1097 as shown in Figure 3, using the internal voltage
reference to bias the Photodiode. The internal reference supplies a low noise output with high power supply
rejection to 4MHz.
The voltage across the photodiode is equal to the power supply voltage, Vpdc minus the base emitter voltage
of the input transistor on the PHY1097, equal to Vpda. The anode voltage, Vpda is sensitive to temperature
and has a typical value of 0.8V.
3.3V
Vcc
RSSI
MON
Internal Voltage
Reference
Vpdc
PDC
1
Vpda
PDA
0V
PHY1097
Figure 3 – Photodiode biased by internal voltage regulator
PHY1097-03-RD-1.5
Datasheet
Page 4
Single ended connection of a PIN photodiode to the PDA input with an external bias supply can produce
inconsistent sensitivity and bandwidth operation.
If an Avalanche Photodiode (APD) is to be used this can be connected as shown in figure 4, filtering of the
bias voltage must be provided externally to the PHY1097 to avoid damaging the device. The input current
applied to the PDA pad with Vcc off (<3.0V) must not exceed the value given in the section 3.1 maximum
ratings table, if exceeded damage may occur to the PDA input. The RSSI senses the MPD current from the
PDC pad, this is not used in single ended applications such as APD. In this case a current mirror should be
included on the APD bias to provide the RSSI current.
Vpd
470pF
Vcc
10nF
APD
PHY1097
470pF
Figure 4 – Connection of an avalanche photodiode
4.2 DC Cancellation
The removal of the direct current component of the input signal is necessary to reduce the pulse width
distortion for signals with a 50% mark density.
The DC cancellation block provides low frequency feedback using an internally compensated amplifier,
removing the need for external compensation capacitors.
4.3 Transimpedance Amplifier (TIA)
The transimpedance (current to voltage) stage is a very low noise amplifier with a feedback resistor to set the
gain. This stage features automatic gain control, where the transimpedance depends on the output signal
level. This ensures that the output does not overload the subsequent stage in the signal path.
An internal voltage regulator is used to power the front-end transimpedance amplifier in order to improve the
rejection of power supply noise.
4.4 Output Data Polarity
The data polarity pin has an internal 8kΩ pull-up resistor. In normal non-inverting operation, where there is no
external connection, the pin pulls to VDD. In this mode an optical '1' gives maximum input current and a
voltage '1' on the positive output pin Rx+. Connection of the pad to ground selects an inverted sense output.
4.5 Output Gain Stage
The output gain stage features a voltage amplifier, a single ended to differential converter and a supply
referenced differential output buffer.
The PHY1097 has a 50Ω single ended output impedance, which is suitable for the majority of applications.
For optimum supply-noise rejection, the PHY1097 should be terminated differentially.
PHY1097-03-RD-1.5
Datasheet
Page 5
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