Operating Temperature Range ........................ -40NC to +100NC
Programming Temperature Range .................... -40NC to +85NC
Storage Temperature Range............................ -55NC to +125NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
(T
A
= -40NC to +100NC, unless otherwise noted.)
PARAMETER
Supply Voltage
Input Logic 1
(SCL, SDA, A0, A1)
Input Logic 0
(SCL, SDA, A0, A1)
SYMBOL
V
CC
V
IH
V
IL
(Note 1)
CONDITIONS
MIN
2.8
0.7 x V
CC
-0.3
TYP
MAX
5.5
V
CC
+ 0.3
+0.3 x V
CC
UNITS
V
V
V
DC ELECTRICAL CHARACTERISTICS
(V
CC
= +2.8V to +5.5V, T
A
= -40NC to +100NC, unless otherwise noted.)
PARAMETER
Input Leakage
(SDA, SCL, A0, A1)
V
CC
Supply Current
Low-Level Output Voltage (SDA)
I/O Capacitance
Power-On Recall Voltage
Power-Up Recall Delay
SYMBOL
I
L
I
CC
V
OL
C
I/O
V
POR
t
D
(Note 3)
(Note 4)
1.6
(Note 2)
3mA sink current
0
5
CONDITIONS
MIN
-1
0.9
TYP
MAX
+1
2.0
0.4
10
2.7
5
UNITS
FA
mA
V
pF
V
ms
DAC ELECTRICAL CHARACTERISTICS
(V
CC
= +2.8V to +5.5V, T
A
= -40NC to +100NC, unless otherwise noted.)
PARAMETER
Delta-Sigma Clock Frequency
Reference Voltage Input (V
REF
)
Output Range
Output Resolution
Output Impedance
R
DS
See the
Delta-Sigma DAC Output and
Control
section for details
35
SYMBOL
f
DS
V
REF
Minimum 0.1FF to GND
2.4
0
CONDITIONS
MIN
TYP
2.1
V
CC
V
REF
10
100
MAX
UNITS
MHz
V
V
Bits
I
Maxim Integrated
2
DS3911
Temperature-Controlled, Nonvolatile,
I2C Quad DAC
TEMPERATURE SENSOR CHARACTERISTICS
(V
CC
= +2.8V to +5.5V, T
A
= -40NC to +100NC, unless otherwise noted.)
PARAMETER
Temperature Error
Update Rate (Temperature and
Supply Conversion Time)
t
FRAME
SYMBOL
CONDITIONS
T
A
= -40NC to +100NC
16
MIN
TYP
MAX
Q5
UNITS
NC
ms
ANALOG VOLTAGE MONITORING CHARACTERISTICS
(V
CC
= +2.8V to +5.5V, T
A
= -40NC to +100NC, unless otherwise noted.)
PARAMETER
Supply Resolution
Input/Supply Accuracy
Input Supply Offset
Update Rate (Temperature and
Supply Conversion Time)
SYMBOL
LSB
ACC
V
OS
t
FRAME
CONDITIONS
Full-scale voltage of 6.5536V
At factory setting
(Note 5)
MIN
TYP
800
0.25
0
16
1
5
MAX
UNITS
FV
%FS
LSB
ms
I
2
C AC ELECTRICAL CHARACTERISTICS
(V
CC
= +2.8V to +5.5V, T
A
= -40NC to +100NC, timing referenced to V
IL(MAX)
and V
IH(MIN)
, unless otherwise noted.) (See
Figure 1.)
PARAMETER
SCL Clock Frequency
Bus Free Time Between STOP
and START Conditions
Hold Time (Repeated) START
Condition
Low Period of SCL
High Period of SCL
Data Hold Time
Data Setup Time
START Set-Up Time
SDA and SCL Rise Time
SDA and SCL Fall Time
STOP Set-Up Time
SDA and SCL Capacitive
Loading
EEPROM Write Time
A0, A1 Setup Time
A0, A1 Hold Time
Input Capacitance on A0, A1,
SDA, or SCL
Startup time
Maxim Integrated
SYMBOL
f
SCL
t
BUF
t
HD:STA
t
LOW
t
HIGH
t
HD:DAT
t
SU:DAT
t
SU:STA
t
R
t
F
t
SU:STO
C
B
t
W
t
SU:A
t
HD:A
C
I
t
ST
(Note 7)
(Note 8)
Before START
After STOP
(Note 7)
(Note 7)
(Note 6)
CONDITIONS
MIN
0
1.3
0.6
1.3
0.6
0
100
0.6
TYP
MAX
400
UNITS
kHz
Fs
Fs
Fs
Fs
0.9
Fs
ns
Fs
20 + 0.1C
B
20 + 0.1C
B
0.6
300
300
ns
ns
Fs
400
10
0.6
0.6
5
10
2
20
pF
ms
Fs
Fs
pF
ms
3
DS3911
Temperature-Controlled, Nonvolatile,
I2C Quad DAC
NONVOLATILE MEMORY CHARACTERISTICS
(V
CC
= +2.8V to +5.5V, unless otherwise noted.)
PARAMETER
EEPROM Write Cycles (Note 9)
SYMBOL
T
A
= +85NC
T
A
= +25NC
CONDITIONS
MIN
10,000
50,000
TYP
MAX
UNITS
Writes
Note 1:
All voltages are referenced to ground. Currents entering the device are specified as positive, and currents exiting the
device are specified as negative.
Note 2:
I
CC
is specified with SCL = SDA = V
CC
, and EN bit = 1. Typical values are at V
CC
= 3.3V and T
A
= +25NC.
Note 3:
This is the minimum V
CC
voltage that causes NV memory to be recalled.
Note 4:
This is the time from V
CC
> V
POR
until initial memory recall is complete.
Note 5:
Guaranteed by design.
Note 6:
I
2
C interface timing shown is for fast-mode (400kHz) operation. This device is also backward compatible with I
2
C stan-
dard-mode timing.
Note 7:
C
B
= total capacitance of one bus line in pF.
Note 8:
EEPROM write time begins after a STOP condition occurs.
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