Data Sheet No. PD60200
revB
IR2304(S) & (PbF)
Features
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HALF-BRIDGE DRIVER
Product Summary
V
OFFSET
I
O+/-
(min)
V
OUT
Delay Matching
Internal deadtime
t
on/off
(typ.)
600V max.
60 mA/130 mA
10 - 20V
50 ns
100 ns
220/220 ns
•
Floating channel designed for bootstrap operation
to +600V. Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Under voltage lockout for both channels
3.3V, 5V, and 15V input logic input compatible
Cross-conduction prevention logic
Matched propagation delay for both channels
Lower di/dt gate driver for better noise immunity
Internal 100ns dead-time
Output in phase with input
Available in Lead-Free
Package
Description
The IR2304(S) are a high voltage, high speed
power MOSFET and IGBT driver with inde-
pendent high and low side referenced output
channels. Proprietary HVIC and latch immune
CMOS technologies
enable ruggedized monolithic construction.
The logic input is compatible with standard
CMOS or LSTTL output, down to 3.3V logic.
The output driver features a high pulse cur-
rent buffer stage designed for minimum driver
cross-conduction. The floating channel can be
used to drive an N-channel power MOSFET
or IGBT in the high side configuration which
operates up to 600 volts.
8-Lead PDIP
8 Lead SOIC
2106/2301/2108/2109/2302/2304 Feature Comparison
Part
2106/2301
21064
2108
21084
2109/2302
21094
2304
Input
logic
HIN/LIN
HIN/LIN
IN/SD
HIN/LIN
Cross-
conduction
prevention
logic
no
yes
yes
yes
Dead-Time
Ground Pins
COM
VSS/COM
COM
VSS/COM
COM
VSS/COM
COM
none
Internal 540ns
Programmable 0.54~5
µs
Internal 540ns
Programmable 0.54~5
µs
Internal 100ns
Block Diagram
Vcc
up to 600V
HIN
LIN
LIN
HIN
VCC
COM
VB
HO
VS
LO
TO
LOAD
IR2304
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1
IR2304(S)&(PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions.
Symbol
V
S
V
B
V
HO
V
CC
V
LO
V
IN
Com
dV
S
/dt
P
D
Rth
JA
T
J
T
S
T
L
High side offset voltage
Definition
High side floating supply voltage
High side floating output voltage HO
Low side and logic fixed supply voltage
Low side output voltage LO
Logic input voltage (HIN, LIN)
Logic ground
Allowable offset voltage SLEW RATE
Package power dissipation @ T
A
≤
+25°C
Thermal resistance, junction to ambient
8-Lead SOIC
8-Lead PDIP
8-Lead SOIC
8-Lead PDIP
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
Min.
V
B
- 25
-0.3
V
S
- 0.3
-0.3
-0.3
-0.3
V
CC
-25
—
—
—
—
—
—
-50
—
Max.
V
B
+ 0.3
625
V
B
+ 0.3
25
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
50
0.625
1.0
200
125
150
150
300
Units
V
V/ns
W
°C/W
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential.
Symbol
V
B
V
S
V
HO
V
LO
V
IN
V
CC
T
A
Definition
High side floating supply voltage
High side floating supply offset voltage
High side (HO) output voltage
Low side (LO) output voltage
Logic input voltage (HIN, LIN)
Low side supply voltage
Ambient temperature
Min.
V
S
+ 10
Note 1
V
S
COM
COM
10
-40
Max.
V
S
+ 20
600
V
B
V
CC
V
CC
20
125
Units
V
°C
Note 1:
Logic operational for V
S
of COM -5 to COM +600V. Logic state held for V
S
of COM -5V to COM -V
BS
.
2
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IR2304(S)&(PbF)
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V and T
A
= 25°C unless otherwise specified. The V
IN
, V
TH
and I
IN
parameters are referenced to
COM. The V
O
and I
O
parameters are referenced to COM and V
S
is applicable to HO and LO.
Symbol
V
CCUV+
V
BSUV+
V
CCUV-
V
BSUV-
V
CCUVH
V
BSUVH
I
LK
I
QBS
I
QCC
V
IH
V
IL
V
OH
V
OL
I
IN+
I
IN-
I
O+
I
O-
Definition
V
CC
and V
BS
supply undervoltage positive going
threshold
V
CC
and V
BS
supply undervoltage negative going
threshold
V
CC
supply undervoltage lockout hysteresis
Offset supply leakage current
Quiescent V
BS
supply current
Quiescent V
CC
supply current
Logic “1” input voltage
Logic “0” input voltage
High level output voltage, V
BIAS
- V
O
Low level output voltage, V
O
Logic “1” input bias current
Logic “0” input bias current
Output high short circuit pulse current
Output low short circuit pulsed current
Min. Typ. Max. Units Test Conditions
8
7.4
0.3
—
20
50
2.3
—
—
—
—
—
60
130
8.9
8.2
0.7
—
60
120
—
—
—
—
5
1.0
—
—
9.8
9
—
50
150
240
—
0.8
2.8
1.2
40
2.0
—
—
mA
µA
V
I
O
= 20mA
V
IN
= 5V
V
IN
= 0V
V
O
= 0V
PW
≤
10
µs
µA
V
B
= V
S
= 600V
V
IN
= 0V or 5V
V
IN
= 0V or 5V
V
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V, V
S
= COM, C
L
= 1000 pF and T
A
= 25°C unless otherwise specified.
Symbol
ton
toff
tr
tf
DT
MT
Definition
Turn-on propagation delay
Turn-off propagation delay
Turn-on rise time
Turn-off fall time
Dead time
Delay matching, HS & LS turn-on/off
Min. Typ. Max. Units Test Conditions
120
130
60
20
80
—
220
220
200
100
100
—
320
330
300
170
190
50
ns
V
S
= 0V
V
S
= 0V or 600V
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3
IR2304(S)&(PbF)
Functional Block Diagram
VB
2304
HIN
PULSE
GENERATOR
HV
LEVEL
SHIFTER
UV
DETECT
R
PULSE
FILTER
R
S
Q
HO
VS
SHOOT-
THROUGH
PREVENTION
VCC
UV
DETECT
LO
LIN
DELAY
COM
Lead Definitions
Symbol
V
CC
COM
HIN
LIN
V
B
HO
V
S
LO
Description
Low side supply voltage
Logic ground and low side driver return
Logic input for high side gate driver output
Logic input for low side gate driver output
High side floating supply
High side driver output
High voltage floating supply return
Low side driver output
4
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IR2304(S)&(PbF)
Lead Assignments
1
LIN
VB
8
1
LIN
VB
8
2
HIN
HO
7
2
HIN
HO
7
3
VCC
VS
6
3
VCC
VS
6
4
COM
LO
5
4
COM
LO
5
8-Lead PDIP
8-Lead SOIC
HIN
LIN
HO
Internal Deadtime
LO
Figure 1. Input/Output Functionality Diagram
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