Filterless, High Efficiency,
Mono 2.5 W Class-D Audio Amplifier
SSM2377
FEATURES
Filterless, Class-D amplifier with spread-spectrum
Σ-Δ modulation
2.5 W into 4 Ω load and 1.4 W into 8 Ω load at 5.0 V supply
with <1% total harmonic distortion plus noise (THD + N)
92% efficiency at 5.0 V, 1.4 W into 8 Ω speaker
>100 dB signal-to-noise ratio (SNR)
High PSRR at 217 Hz: 80 dB
Ultralow EMI emissions
Single-supply operation from 2.5 V to 5.5 V
Gain select function: 6 dB or 12 dB
Fixed input impedance of 80 kΩ
100 nA shutdown current
Short-circuit and thermal protection with autorecovery
Available in a 9-ball, 1.2 mm × 1.2 mm WLCSP
Pop-and-click suppression
The SSM2377 operates with 92% efficiency at 1.4 W into 8 Ω
from a 5.0 V supply and has an SNR of >100 dB.
Spread-spectrum pulse density modulation (PDM) is used to
provide lower EMI-radiated emissions compared with other
Class-D architectures. The inherent randomized nature of
spread-spectrum PDM eliminates the clock intermodulation
(beating effect) of several amplifiers in close proximity.
The SSM2377 produces ultralow EMI emissions that signifi-
cantly reduce the radiated emissions at the Class-D outputs,
particularly above 100 MHz. The SSM2377 passes FCC Class B
radiated emission testing with 50 cm, unshielded speaker cable
without any external filtering. The ultralow EMI emissions of the
SSM2377 are also helpful for antenna and RF sensitivity problems.
The device is configured for either a 6 dB or a 12 dB gain setting
by connecting the GAIN pin to the VDD pin or the GND pin,
respectively. Input impedance is a fixed value of 80 kΩ, indepen-
dent of the gain select operation.
The SSM2377 has a micropower shutdown mode with a typical
shutdown current of 100 nA. Shutdown is enabled by applying
a logic low to the SD pin.
The device also includes pop-and-click suppression circuitry,
which minimizes voltage glitches at the output during turn-on
and turn-off, reducing audible noise on activation and deactivation.
Built-in input low-pass filtering is also included to suppress out-
of-band noise interference to the PDM modulator.
The SSM2377 is specified over the industrial temperature range
of −40°C to +85°C. It has built-in thermal shutdown and output
short-circuit protection. It is available in a halide-free, 9-ball, 0.4 mm
pitch, 1.2 mm × 1.2 mm wafer level chip scale package (WLCSP).
APPLICATIONS
Mobile phones
MP3 players
Portable electronics
GENERAL DESCRIPTION
The
SSM2377
is a fully integrated, high efficiency, Class-D audio
amplifier. It is designed to maximize performance for mobile
phone applications. The application circuit requires a minimum
of external components and operates from a single 2.5 V to 5.5 V
supply. It is capable of delivering 2.5 W of continuous output power
with <1% THD + N driving a 4 Ω load from a 5.0 V supply.
The SSM2377 features a high efficiency, low noise modulation
scheme that requires no external LC output filters. The modu-
lation operates with high efficiency even at low output power.
FUNCTIONAL BLOCK DIAGRAM
10µF
0.1µF
POWER SUPPLY
2.5V TO 5.5V
VDD
OUT+
MODULATOR
(Σ-Δ)
FET
DRIVER
OUT–
SSM2377
22nF
AUDIO IN–
AUDIO IN+
22nF
SHUTDOWN
IN+
IN–
80kΩ
80kΩ
SD
GAIN
BIAS
INTERNAL
OSCILLATOR
POP/CLICK
AND EMI
SUPPRESSION
GND
09824-001
GAIN SELECT
GAIN = 6dB OR 12dB
Figure 1.
Rev. 0
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
SSM2377* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
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DESIGN RESOURCES
•
SSM2377 Material Declaration
•
PCN-PDN Information
•
Quality And Reliability
•
Symbols and Footprints
EVALUATION KITS
•
SSM2377 Evaluation Board
DOCUMENTATION
Data Sheet
•
SSM2377: Filterless, High Efficiency,Mono 2.5 W Class-D
Audio Amplifier
User Guides
•
UG-298: Evaluation Board for the SSM2377 Filterless,
Class-D Audio Amplifier
DISCUSSIONS
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SSM2377
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
Typical Performance Characteristics ............................................. 7
Typical Application Circuits.......................................................... 12
Theory of Operation ...................................................................... 13
Overview ..................................................................................... 13
Gain Selection ............................................................................. 13
Pop-and-Click Suppression ...................................................... 13
EMI Noise.................................................................................... 13
Output Modulation Description .............................................. 13
Layout .......................................................................................... 14
Input Capacitor Selection .......................................................... 14
Power Supply Decoupling ......................................................... 14
Outline Dimensions ....................................................................... 15
Ordering Guide .......................................................................... 15
REVISION HISTORY
5/11—Revision
0: Initial Version
Rev. 0 | Page 2 of 16
SSM2377
SPECIFICATIONS
V
DD
= 5.0 V, T
A
= 25°C, R
L
= 8 Ω +33 μH, unless otherwise noted.
Table 1.
Parameter
DEVICE CHARACTERISTICS
Output Power
Symbol
P
OUT
Test Conditions/Comments
f = 1 kHz, 20 kHz BW
R
L
= 8 Ω, THD = 1%, V
DD
= 5.0 V
R
L
= 8 Ω, THD = 1%, V
DD
= 3.6 V
R
L
= 8 Ω, THD = 1%, V
DD
= 2.5 V
R
L
= 8 Ω, THD = 10%, V
DD
= 5.0 V
R
L
= 8 Ω, THD = 10%, V
DD
= 3.6 V
R
L
= 8 Ω, THD = 10%, V
DD
= 2.5 V
R
L
= 4 Ω, THD = 1%, V
DD
= 5.0 V
R
L
= 4 Ω, THD = 1%, V
DD
= 3.6 V
R
L
= 4 Ω, THD = 1%, V
DD
= 2.5 V
R
L
= 4 Ω, THD = 10%, V
DD
= 5.0 V
R
L
= 4 Ω, THD = 10%, V
DD
= 3.6 V
R
L
= 4 Ω, THD = 10%, V
DD
= 2.5 V
P
OUT
= 1.4 W into 8 Ω, V
DD
= 5.0 V
P
OUT
= 1 W into 8 Ω, f = 1 kHz, V
DD
= 5.0 V
P
OUT
= 0.5 W into 8 Ω, f = 1 kHz, V
DD
= 3.6 V
Input Common-Mode Voltage
Range
Common-Mode Rejection
Ratio
Average Switching Frequency
Clock Frequency
Differential Output Offset
Voltage
POWER SUPPLY
Supply Voltage Range
Power Supply Rejection Ratio
V
CM
CMRR
f
SW
f
OSC
V
OOS
100 mV rms at 1 kHz
1.0
51
256
6.2
0.4
Min
Typ
Max
Unit
Efficiency
Total Harmonic Distortion
Plus Noise
η
THD + N
1.41
0.72
0.33
1.78
0.90
0.41
2.49
1.25
0.54
3.17
1
1.56
0.68
92.4
0.007
0.009
V
DD
− 1
W
W
W
W
W
W
W
W
W
W
W
W
%
%
%
V
dB
kHz
MHz
mV
Gain = 6 dB
5.0
V
DD
Supply Current
PSRR
GSM
PSRR
I
SY
Shutdown Current
GAIN CONTROL
Closed-Loop Gain
Input Impedance
SHUTDOWN CONTROL
Input Voltage High
Input Voltage Low
Turn-On Time
Turn-Off Time
Output Impedance
I
SD
Gain
Z
IN
V
IH
V
IL
t
WU
t
SD
Z
OUT
Guaranteed from PSRR test
Inputs are ac-grounded, C
IN
= 0.1 μF,
gain = 6 dB
V
RIPPLE
= 100 mV at 217 Hz
V
RIPPLE
= 100 mV at 1 kHz
V
IN
= 0 V, no load, V
DD
= 5.0 V
V
IN
= 0 V, no load, V
DD
= 3.6 V
V
IN
= 0 V, no load, V
DD
= 2.5 V
V
IN
= 0 V, R
L
= 8 Ω + 33 μH, V
DD
= 5.0 V
V
IN
= 0 V, R
L
= 8 Ω + 33 μH, V
DD
= 3.6 V
V
IN
= 0 V, R
L
= 8 Ω + 33 μH, V
DD
= 2.5 V
SD = GND
GAIN = GND
GAIN = VDD
SD = VDD, gain = 6 dB or 12 dB
2.5
5.5
V
80
80
2.5
2.0
1.9
2.5
2.0
1.8
100
12
6
80
1.35
0.35
dB
dB
mA
mA
mA
mA
mA
mA
nA
dB
dB
kΩ
V
V
ms
μs
kΩ
SD rising edge from GND to VDD
SD falling edge from VDD to GND
SD = GND
Rev. 0 | Page 3 of 16
12.5
5
100
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