5P49V5925A503NLGI datasheet, PDF

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5P49V5925A503NLGI: DescriptionClock Generators & Support Products LP Prog CLK Gen 5 LVCMOS 4 Output; Categorysemiconductor Analog mixed-signal IC; File Size338KB，27 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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Clock Generators & Support Products LP Prog CLK Gen 5 LVCMOS 4 Output

5P49V5925A503NLGI Parametric

Parameter Name	Attribute value
Product Attribute	Attribute Value
Manufacturer	IDT (Integrated Device Technology)
Product Category	Clock Generators & Support Products
RoHS	Details
Packaging	Tray
Factory Pack Quantity	490

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Programmable Clock Generator

5P49V5925

DATASHEET

Description

The 5P49V5925 is a programmable clock generator intended

for high-performance consumer, networking, industrial,

computing, and data-communications applications.

Configurations may be stored in on-chip One-Time

Programmable (OTP) memory or changed using I

interface. This is IDT’s fifth generation of programmable clock

technology (VersaClock

5).

The frequencies are generated from a single reference clock.

The reference clock can come from one of the two redundant

clock inputs. A glitchless manual switchover function allows

one of the redundant clocks to be selected during normal

operation.

Two select pins allow up to 4 different configurations to be

programmed and accessible using processor GPIOs or

bootstrapping. The different selections may be used for

different operating modes (full function, partial function, partial

power-down), regional standards (US, Japan, Europe) or

system production margin testing.

The device may be configured to use one of two I

addresses to allow multiple devices to be used in a system.

Features

•

Generates up to four independent output frequencies

•

High-performance, low phase noise PLL, < 0.7 ps RMS

typical phase jitter on outputs

•

Four fractional output dividers (FODs)

•

Independent Spread Spectrum capability on each output

•

Four banks of internal non-volatile in-system

programmable or factory programmable OTP memory

•

C serial programming interface

•

Five LVCMOS outputs, including one reference output

•

I/O Standards:

•

– Single-ended I/Os: 1.8V to 3.3V LVCMOS

Input frequency ranges:

– LVCMOS Reference Clock Input (XIN/REF) – 1MHz to

200MHz

– LVDS, LVPECL, HCSL Differential Clock Input (CLKIN,

CLKINB) – 1MHz to 200MHz

– Crystal frequency range: 8MHz to 40MHz

•

Output frequency ranges:

•

– LVCMOS Clock Outputs – 1MHz to 200MHz

Individually selectable output voltage (1.8V, 2.5V, 3.3V) for

each output

Redundant clock inputs with manual switchover

Programmable loop bandwidth

Programmable slew rate control

Programmable crystal load capacitance

Individual output enable/disable

Power-down mode

1.8V, 2.5V or 3.3V core V

DDD

, V

DDA

Available in 24-pin VFQFPN 4mm x 4mm package

-40° to +85°C industrial temperature operation

Pin Assignment

OUT0_SEL_I2CB

DDO

OUT1

DDD

CLKIN

CLKINB

XOUT

XIN/REF

DDA

CLKSEL

24 23 22 21 20 19

DDO

OUT2

DDO

OUT3

EPAD

GND

10 11 12

SEL1/SDA

SEL0/SCL

SD/OE

DDO

24-pin VFQFPN

5P49V5925 AUGUST 9, 2017

OUT4

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