or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
1
ispMACH 4064ZE
64
4.7
2.5
3.2
241
1.8V
32+4
48+4
48+4
64+10
ispMACH 4128ZE
128
5.8
2.9
3.8
200
1.8V
ispMACH 4256ZE
256
5.8
2.9
3.8
200
1.8V
32
4.4
2.2
3.0
260
1.8V
32+4
32+4
64+10
96+4
96+4
64+10
96+14
108+4
64+10
96+4
www.latticesemi.com
1
DS1022_01.8
ispMACH 4000ZE Family Data Sheet
Introduction
The high performance ispMACH 4000ZE family from Lattice offers an ultra low power CPLD solution. The new fam-
ily is based on Lattice’s industry-leading ispMACH 4000 architecture. Retaining the best of the previous generation,
the ispMACH 4000ZE architecture focuses on significant innovations to combine high performance with low power
in a flexible CPLD family. For example, the family’s new Power Guard feature minimizes dynamic power consump-
tion by preventing internal logic toggling due to unnecessary I/O pin activity.
The ispMACH 4000ZE combines high speed and low power with the flexibility needed for ease of design. With its
robust Global Routing Pool and Output Routing Pool, this family delivers excellent First-Time-Fit, timing predictabil-
ity, routing, pin-out retention and density migration.
The ispMACH 4000ZE family offers densities ranging from 32 to 256 macrocells. There are multiple density-I/O
combinations in Thin Quad Flat Pack (TQFP), Chip Scale BGA (csBGA), and Ultra Chip Scale BGA (ucBGA) pack-
ages ranging from 32 to 144 pins/balls. Table 1 shows the macrocell, package and I/O options, along with other key
parameters.
A user programmable internal oscillator and a timer are included in the device for tasks like LED control, keyboard
scanner and similar housekeeping type state machines. This feature can be optionally disabled to save power.
The ispMACH 4000ZE family has enhanced system integration capabilities. It supports a 1.8V supply voltage and
3.3V, 2.5V, 1.8V and 1.5V interface voltages. Additionally, inputs can be safely driven up to 5.5V when an I/O bank
is configured for 3.3V operation, making this family 5V tolerant. The ispMACH 4000ZE also offers enhanced I/O
features such as slew rate control, PCI compatibility, bus-keeper latches, pull-up resistors, pull-down resistors,
open drain outputs and hot socketing. Pull-up, pull-down and bus-keeper features are controllable on a “per-pin”
basis. The ispMACH 4000ZE family members are 1.8V in-system programmable through the IEEE Standard 1532
interface. IEEE Standard 1149.1 boundary scan testing capability also allows product testing on automated test
equipment. The 1532 interface signals TCK, TMS, TDI and TDO are referenced to V
CC
(logic core).
Overview
The ispMACH 4000ZE devices consist of multiple 36-input, 16-macrocell Generic Logic Blocks (GLBs) intercon-
nected by a Global Routing Pool (GRP). Output Routing Pools (ORPs) connect the GLBs to the I/O Blocks (IOBs),
which contain multiple I/O cells. This architecture is shown in Figure 1.
Figure 1. Functional Block Diagram
CLK0/I
CLK1/I
CLK2/I
CLK3/I
V
CCO0
GND
V
CCO1
GND
I/O
Block
16
ORP
GOE0
GOE1
V
CC
GND
OSC
I/O
Block
ORP
16
Global Routing Pool
Generic
Logic
Block
16
36
16
36
Generic
Logic
Block
I/O Bank 0
TCK
TMS
TDI
TDO
I/O
Block
ORP
16
Generic
Logic
Block
16
36
16
36
Generic
Logic
Block
I/O
Block
16
ORP
2
I/O Bank 1
ispMACH 4000ZE Family Data Sheet
The I/Os in the ispMACH 4000ZE are split into two banks. Each bank has a separate I/O power supply. Inputs can
support a variety of standards independent of the chip or bank power supply. Outputs support the standards com-
patible with the power supply provided to the bank. Support for a variety of standards helps designers implement
designs in mixed voltage environments. In addition, 5V tolerant inputs are specified within an I/O bank that is con-
nected to a V
CCO
of 3.0V to 3.6V for LVCMOS 3.3, LVTTL and PCI interfaces.
Architecture
There are a total of two GLBs in the ispMACH 4032ZE, increasing to 16 GLBs in the ispMACH 4256ZE. Each GLB
has 36 inputs. All GLB inputs come from the GRP and all outputs from the GLB are brought back into the GRP to
be connected to the inputs of any other GLB on the device. Even if feedback signals return to the same GLB, they
still must go through the GRP. This mechanism ensures that GLBs communicate with each other with consistent
and predictable delays. The outputs from the GLB are also sent to the ORP. The ORP then sends them to the asso-
ciated I/O cells in the I/O block.
Generic Logic Block
The ispMACH 4000ZE GLB consists of a programmable AND array, logic allocator, 16 macrocells and a GLB clock
generator. Macrocells are decoupled from the product terms through the logic allocator and the I/O pins are decou-
pled from macrocells through the ORP. Figure 2 illustrates the GLB.
Figure 2. Generic Logic Block
CLK0
CLK1
CLK2
CLK3
To GRP
Clock
Generator
1+OE
16 MC Feedback Signals
1+OE
1+OE
1+OE
1+OE
1+OE
1+OE
1+OE
To Product Term
Output Enable Sharing.
Also, To Input Enable of
Power Guard on I/Os
in the block.
Logic Allocator
AND Array
36 Inputs,
83 Product Terms
16 Macrocells
36 Inputs
from GRP
AND Array
The programmable AND Array consists of 36 inputs and 83 output product terms. The 36 inputs from the GRP are
used to form 72 lines in the AND Array (true and complement of the inputs). Each line in the array can be con-
nected to any of the 83 output product terms via a wired-AND. Each of the 80 logic product terms feed the logic
allocator with the remaining three control product terms feeding the Shared PT Clock, Shared PT Initialization and
Shared PT OE. The Shared PT Clock and Shared PT Initialization signals can optionally be inverted before being
fed to the macrocells.
Every set of five product terms from the 80 logic product terms forms a product term cluster starting with PT0.
There is one product term cluster for every macrocell in the GLB. Figure 3 is a graphical representation of the AND
Array.
3
To ORP
ispMACH 4000ZE Family Data Sheet
Figure 3. AND Array
In[0]
In[34]
In[35]
PT0
PT1
PT2
PT3
PT4
Cluster 0
PT75
PT76
PT77
Cluster 15
PT78
PT79
PT80 Shared PT Clock
PT81 Shared PT Initialization
PT82 Shared PTOE/BIE
Note:
Indicates programmable fuse.
Enhanced Logic Allocator
Within the logic allocator, product terms are allocated to macrocells in product term clusters. Each product term
cluster is associated with a macrocell. The cluster size for the ispMACH 4000ZE family is 4+1 (total 5) product
terms. The software automatically considers the availability and distribution of product term clusters as it fits the
functions within a GLB. The logic allocator is designed to provide two speed paths: 20-PT Speed Locking path and
an up to 80-PT path. The availability of these two paths lets designers trade timing variability for increased perfor-
mance.
The enhanced Logic Allocator of the ispMACH 4000ZE family consists of the following blocks:
• Product Term Allocator
• Cluster Allocator
• Wide Steering Logic
Figure 4 shows a macrocell slice of the Logic Allocator. There are 16 such slices in the GLB.
Figure 4. Macrocell Slice
to to
n-1 n-2
from from
n-1 n-4
From
n-4
n
5-PT
1-80
PTs
To XOR (MC)
Cluster
to
n+1
Individual Product
Term Allocator
from from
n+2 n+1
Cluster
Allocator
To
n+4
SuperWIDE™
Steering Logic
4
ispMACH 4000ZE Family Data Sheet
Product Term Allocator
The product term allocator assigns product terms from a cluster to either logic or control applications as required
by the design being implemented. Product terms that are used as logic are steered into a 5-input OR gate associ-
ated with the cluster. Product terms that used for control are steered either to the macrocell or I/O cell associated
with the cluster. Table 2 shows the available functions for each of the five product terms in the cluster.
Table 2. Individual PT Steering
Product Term
PT
n
PT
n
+1
PT
n
+2
PT
n
+3
PT
n
+4
Logic
Logic PT
Logic PT
Logic PT
Logic PT
Logic PT
Single PT for XOR/OR
Individual Clock (PT Clock)
Individual Initialization or Individual Clock Enable (PT Initialization/CE)
Individual Initialization (PT Initialization)
Individual OE (PTOE)
Control
Cluster Allocator
The cluster allocator allows clusters to be steered to neighboring macrocells, thus allowing the creation of functions
with more product terms. Table 3 shows which clusters can be steered to which macrocells. Used in this manner,
the cluster allocator can be used to form functions of up to 20 product terms. Additionally, the cluster allocator
accepts inputs from the wide steering logic. Using these inputs, functions up to 80 product terms can be created.
Table 3. Available Clusters for Each Macrocell
Macrocell
M0
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
M11
M12
M13
M14
M15
—
C0
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C0
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
Available Clusters
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
—
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
—
—
Wide Steering Logic
The wide steering logic allows the output of the cluster allocator n to be connected to the input of the cluster alloca-
tor
n+4.
Thus, cluster chains can be formed with up to 80 product terms, supporting wide product term functions
and allowing performance to be increased through a single GLB implementation. Table 4 shows the product term
I use STM8S208RBT6 compiler IAR for STM8 v1.20, the program size is about 20K, and nearly 1K of SRAM is used. The system settings are set according to a routine.Recently, the frequency of STM8 sometim...
I started working. I spent a Sunday making two tools. One is USB to UART, which is mainly used for program debugging. I use the hyperterminal to check the program status. The chip used is CP2102. I wa...
[p=24, null, left][color=#434343][font=微软雅黑, Tahoma, Verdana, 宋体][size=16px][Abstract]Four years have passed, and the mobile phone real-name system has not yet been fully implemented. The reasons are ...
RFID wireless radio frequency identification technology uses radio frequency to exchange data in a non-contact two-way communication to achieve the purpose of identification. Compared with traditional...
Definition of interactive projection system:
Interactive projection systems, also known as multimedia interactive projection, are available in floor, wall, and tabletop interactive projection....[Details]
Based on a survey of more than ten intelligent robot companies, this article sorts out and analyzes the current development status of the intelligent industry and the challenges and differences it ...[Details]
Common Mode Semiconductor has officially released its latest generation of power management ICs—the GM6506 series. This fully integrated high-frequency synchronous rectification step-down p...[Details]
On August 21st, Zhiyuan Robotics revealed at its first partner conference that it expects shipments to reach thousands of units this year and tens of thousands next year. The company hopes to reach...[Details]
With the rapid development of electric vehicles in my country, people are beginning to pay attention to the issue of radiation from electric vehicles. We all know that mobile phones emit radiation,...[Details]
Recently, Joyson Electronics has made positive progress in the core technology research and development of the robot's "brain and brain" and key components, and launched the industry's first integr...[Details]
The range of an electric vehicle is crucial to the driving experience, and range anxiety is a common headache when driving an electric vehicle. Although the latest electric vehicles can achieve a r...[Details]
Summer is the peak season for buying and using air conditioners. Do you pay attention to the energy efficiency of your air conditioner? Did you buy a DC inverter air conditioner? Do you know the re...[Details]
introduction
In today's busy society, people experience chronic high stress, which in turn poses a significant threat to our health. Therefore, effectively relieving stress has become a pr...[Details]
As a core component of electric vehicles, power batteries, like batteries for other electronic products, inevitably experience degradation after a certain period of use due to their characteristics...[Details]
When we pick up an unfamiliar object, the first thing we want to know is what it actually does. A drive shaft, as the name suggests, is a shaft that transmits power. It's the transmission medium th...[Details]
The power transmission system between a car's engine and drive wheels is called its drivetrain. It ensures the necessary traction and speed under various driving conditions, and coordinates these t...[Details]
With the global number of new energy vehicles expected to exceed 45 million by 2025, the performance boundaries of battery management systems are being reshaped.
Infineon Technologies
'
...[Details]
Relying on Zena CSS and Arm's complete partner ecosystem, we will accelerate the implementation of autonomous driving.
Close your eyes and imagine yourself getting into your car, rea...[Details]
Currently, PLCs are widely used in various industries, including special machine tools, machine tools, control systems, building automation, steel, petrochemicals, electricity, building materials, ...[Details]
Microcontroller MCU
京公网安备 11010802033920号
EEWORLD
