AS6C8008A Family
Low Power, 1Mx8 SRAM
Document Title
1M x 8 bit Super Low Power and Low Voltage Full CMOS Static RAM
Revision History
Revision No. History
1.0
2.0
-. Initial Draft
-.
Amend Functional Block Diagram and Pin
Configurations
Date
Aug. 7
Mar.
7
2013
2017
Remark
Preliminary
Alliance Memory, Inc., 511 Taylor Way, San Carlos, CA 94070, USA
Tel: +1 650 610 6800 Fax: +1 650 620 9211
Page
1
of
13
March 2017 v.2.0
AS6C8008A Family
Low Power, 1Mx8 SRAM
FEATURES
•
•
•
•
•
•
Process Technology : 0.15 µm Full CMOS
Organization : 1M x 8 bit
Power Supply Voltage : 2.7V ~ 3.6V
Low Data Retention Voltage : 1.5V(Min.)
Three state output and TTL Compatible
Package Type : 48-FPBGA, 44-TSOP2
GENERAL DESCRIPTION
The AS6C8008A families are fabricated by Alliance
Memory’s advanced full CMOS process technology.
The families support industrial temperature range
and Chip Scale Package for user flexibility of system design.
The families also supports low data retention voltage
for battery back- up operation with low data retention
current.
PRODUCT FAMILY
Product
Family
AS6C8008A-45BIN
AS6C8008A-45ZIN
1)
Operating
Temperature
Industrial
-40 ~ 85℃
Vcc Range
2.7 ~ 3.6 V
Speed
45ns
Power Dissipation
Standby
Operating
(I
SB1,
TYP.)
(Icc1,Max.)
Package
Type
48-FPBGA
44-TSOPII
2 mA
1)
4 mA
Typical values are measured at Vcc=3.3V, T
A
=25
o
C and not 100% tested.
Alliance Memory, Inc., 511 Taylor Way, San Carlos, CA 94070, USA
Tel: +1 650 610 6800 Fax: +1 650 620 9211
Page
2
of
13
March 2017 v.2.0
AS6C8008A Family
Low Power, 1Mx8 SRAM
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
A0-A19
DECODER
1024K x 8
MEMORY A RRAY
DQ0-DQ7
I/O DATA
CIR CUIT
COLUMN I/O
CS1
CS2
WE
OE
CONTROL
CIR CUIT
PIN DESCRIPTION
SYMBOL
A0 - A19
DQ0 – DQ7
CS1, CS2
WE
OE
V
CC
V
SS
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Inputs
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
Alliance Memory, Inc., 511 Taylor Way, San Carlos, CA 94070, USA
Tel: +1 650 610 6800 Fax: +1 650 620 9211
Page
3
of
13
March 2017 v.2.0
AS6C8008A Family
Low Power, 1Mx8 SRAM
PIN CONFIGURATIONS
TFBGA
- 48:Top view(ball down)
A
B
C
D
E
F
G
H
NC
NC
DQ0
Vss
Vcc
DQ3
NC
A18
44 - TSOPII:Top view
A4
A3
A2
A1
A0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
TSOP-II
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
NC
NC
DQ1
DQ2
NC
NC
A8
A0
A3
A5
A17
NC
A14
A12
A9
A1
A4
A6
A7
A16
A15
A2
CS2
NC
DQ4
Vcc
Vss
DQ7
NC
A19
CS1
NC
DQ5
DQ6
NC
OE
CS2
A8
NC
NC
DQ7
DQ6
Vss
Vcc
DQ5
DQ4
NC
NC
A9
A10
A11
A12
A13
A14
CS1
NC
NC
DQ0
DQ1
Vcc
Vss
DQ2
DQ3
NC
NC
A13
WE
A10
A11
1
2
3
4
TFBGA
5
6
WE
A19
A18
A17
A16
A15
Alliance Memory, Inc., 511 Taylor Way, San Carlos, CA 94070, USA
Tel: +1 650 610 6800 Fax: +1 650 620 9211
Page
4
of
13
March 2017 v.2.0
AS6C8008A Family
Low Power, 1Mx8 SRAM
ABSOLUTE MAXIMUM RATINGS
1)
Parameter
Voltage on Any Pin Relative to Vss
Voltage on Vcc supply relative to Vss
Power Dissipation
Symbol
V
Ratings
-0.2 to 4.0
-0.2 to 4.0
1.0
Unit
V
V
W
IN
, V
OUT
V
CC
P
D
°C
Operating Temperature
T
A
-40 to 85
1. Stresses greater than those listed under “nav” may cause permanent damage to the device. Functional
operation should be restricted to recommended operating condition. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
FUNCTIONAL DESCRIPTION
CS1
H
X
L
L
L
CS2
X
L
H
H
H
OE
X
X
H
L
X
WE
X
X
H
H
L
DQ0~7
High-Z
High-Z
High-Z
Data Out
Data In
Mode
Deselected
Deselected
Output Disabled
Read
Write
Power
Stand by
Stand by
Active
Active
Active
Note: X = Don't care.
(Must be low or high state)
Alliance Memory, Inc., 511 Taylor Way, San Carlos, CA 94070, USA
Tel: +1 650 610 6800 Fax: +1 650 620 9211
Page
5
of
13
March 2017 v.2.0