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SPC564A70B4CFAY

Description
32-bit Microcontrollers - MCU 32-bit Pwr Architect MCU Auto Chassis
Categorysemiconductor    The embedded processor and controller   
File Size812KB,133 Pages
ManufacturerSTMicroelectronics
Websitehttp://www.st.com/
Environmental Compliance
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SPC564A70B4CFAY Overview

32-bit Microcontrollers - MCU 32-bit Pwr Architect MCU Auto Chassis

SPC564A70B4CFAY Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerSTMicroelectronics
Product Category32-bit Microcontrollers - MCU
RoHSDetails
PackagingTray
Moisture SensitiveYes
Factory Pack Quantity360
SPC564A70B4, SPC564A70L7
32-bit Power Architecture
®
based MCU for automotive
powertrain applications
Datasheet
preliminary data
Features
150 MHz e200z4 Power Architecture
®
core
– Variable length instruction encoding (VLE)
– Superscalar architecture with 2 execution
units
– Up to 2 integer or floating point instructions
per cycle
– Up to 4 multiply and accumulate operations
per cycle
Memory organization
– 2 MB on-chip flash memory with ECC and
read-while-write (RWW)
– 128 KB on-chip SRAM with standby
functionality (32 KB) and ECC
– 8 KB instruction cache (with line locking),
configurable as 2- or 4-way
– 14 + 3 KB eTPU code and data RAM
– 4
×
4 crossbar switch (XBAR)
– 24-entry MMU
Fail Safe Protection
– 16-entry Memory Protection Unit (MPU)
– CRC unit with 3 submodules
– Junction temperature sensor
Interrupt
– Configurable interrupt controller (INTC)
with non-maskable interrupt (NMI)
– 64-channel eDMA
Serial channels
– 3 eSCI modules
– 3 DSPI modules (2 of which support
downstream Micro Second Channel [MSC])
– 3 FlexCAN modules with 64 message
buffers each
Device summary
PBGA324 (23 mm x 23 mm)
LQFP176 (24 mm x 24 mm)
– 1 FlexRay module (V2.1) up to 10 Mbit/s
w/dual or single channel, 128 message
objects, ECC
1 eMIOS (24 unified channels)
1 eTPU2 (second generation eTPU)
– 32 standard channels
– 1 reaction module (6 channels with 3
outputs per channel)
2 enhanced queued analog-to-digital
converters (eQADCs)
– Forty 12-bit input channels
– 688 ns minimum conversion time
On-chip CAN/SCI Bootstrap loader with Boot
Assist Module (BAM)
Nexus: Class 3+ for core; Class 1 for eTPU
JTAG (5-pin)
Development Trigger Semaphore (DTS)
Clock generation
– On-chip 4–40 MHz main oscillator
– On-chip FMPLL (frequency-modulated
phase-locked loop)
Up to 112 general purpose I/O lines
Power reduction modes: slow, stop, and
standby
Flexible supply scheme
– 5 V single supply with external ballast
– Multiple external supply: 5 V, 3.3 V , and
1.2 V
Designed for LQFP176, LBGA208, PBGA324
Table 1.
Memory Flash size
2MB
Part number
Package LQFP176
SPC564A70L7
Package LBGA208
-
Package PBGA324
SPC564A70B4
September 2013
Doc ID 18078 Rev 4
1/133
www.st.com
1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.

SPC564A70B4CFAY Related Products

SPC564A70B4CFAY SPC564A70B4COBR SPC564A70B4CFAR
Description 32-bit Microcontrollers - MCU 32-bit Pwr Architect MCU Auto Chassis 32-bit Microcontrollers - MCU 32-bit Pwr Architect MCU Auto Chassis 32-bit Microcontrollers - MCU 32-bit Pwr Architect MCU Auto Chassis
Product Attribute Attribute Value Attribute Value Attribute Value
Manufacturer STMicroelectronics STMicroelectronics STMicroelectronics
Product Category 32-bit Microcontrollers - MCU 32-bit Microcontrollers - MCU 32-bit Microcontrollers - MCU
RoHS Details Details Details
Packaging Tray Reel Reel
Moisture Sensitive Yes Yes Yes
Factory Pack Quantity 360 350 350
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