BLF8G27LS-100V;
BLF8G27LS-100GV
Power LDMOS transistor
Rev. 5 — 1 September 2015
Product data sheet
1. Product profile
1.1 General description
100 W LDMOS power transistor with improved video bandwidth for base station
applications at frequencies from 2500 MHz to 2700 MHz.
Table 1.
Typical performance
Typical RF performance at T
case
= 25
C in a common source class-AB production test circuit.
Test signal
2-carrier W-CDMA
[1]
f
(MHz)
2500 to 2700
I
Dq
(mA)
900
V
DS
(V)
28
P
L(AV)
(W)
25
G
p
(dB)
17
D
(%)
28
ACPR
5M
(dBc)
32
[1]
Test signal: 3GPP test model 1; 64 DPCH; PAR = 7.2 dB at 0.01 % probability on CCDF per carrier;
5 MHz carrier spacing.
1.2 Features and benefits
Excellent ruggedness
High efficiency
Low R
th
providing excellent thermal stability
Decoupling leads to enable improved video bandwidth (110 MHz typical)
Designed for broadband operation (2500 MHz to 2700 MHz)
Lower output capacitance for improved performance in Doherty applications
Designed for low memory effects providing excellent pre-distortability
Internally matched for ease of use
Integrated ESD protection
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
RF power amplifiers for base stations and multi carrier applications in the
2500 MHz to 2700 MHz frequency range
BLF8G27LS-100(G)V
Power LDMOS transistor
2. Pinning information
Table 2.
Pin
1
2
3
4
5
6
7
1
2
3
4
5
6
7
[1]
Pinning
Description
drain
gate
source
decoupling lead
decoupling lead
n.c.
n.c.
drain
gate
source
decoupling lead
decoupling lead
n.c.
n.c.
6
2
3
7
[1]
[1]
Simplified outline
Graphic symbol
BLF8G27LS-100V (SOT1244B)
4
1
5
6,7
2
1
4,5
3
3
aaa-003619
6
2
7
BLF8G27LS-100GV (SOT1244C)
4
1
5
1
6,7
2
3
aaa-003619
4,5
Connected to flange.
3. Ordering information
Table 3.
Ordering information
Package
Name
BLF8G27LS-100V
BLF8G27LS-100GV
-
-
Description
earless flanged ceramic package; 6 leads
earless flanged ceramic package; 6 leads
Version
SOT1244B
SOT1244C
Type number
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
GS
T
stg
T
j
Parameter
drain-source voltage
gate-source voltage
storage temperature
junction temperature
Conditions
Min
-
0.5
65
-
Max
65
+13
+150
225
Unit
V
V
C
C
BLF8G27LS-100V_27LS-100GV#5
All information provided in this document is subject to legal disclaimers.
© Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet
Rev. 5 — 1 September 2015
2 of 14
BLF8G27LS-100(G)V
Power LDMOS transistor
5. Thermal characteristics
Table 5.
Symbol
R
th(j-c)
Thermal characteristics
Parameter
thermal resistance from junction to case
Conditions
T
case
= 80
C;
P
L
= 48 W
Typ
Unit
0.292 K/W
6. Characteristics
Table 6.
DC characteristics
T
j
= 25
C unless otherwise specified.
Symbol Parameter
V
(BR)DSS
drain-source breakdown voltage
V
GS(th)
I
DSS
I
DSX
I
GSS
g
fs
R
DS(on)
gate-source threshold voltage
drain leakage current
drain cut-off current
gate leakage current
forward transconductance
drain-source on-state resistance
Conditions
V
GS
= 0 V; I
D
= 1 mA
V
DS
= 10 V; I
D
= 153 mA
V
GS
= 0 V; V
DS
= 28 V
V
GS
= V
GS(th)
+ 3.75 V;
V
DS
= 10 V
V
GS
= 11 V; V
DS
= 0 V
V
DS
= 10 V; I
D
= 153 mA
V
GS
= V
GS(th)
+ 3.75 V;
I
D
= 5.35 A
Min
65
1.5
-
-
-
-
-
Typ
-
1.9
-
29
-
1.27
0.1
Max Unit
-
2.3
4.2
-
420
-
-
V
V
A
A
nA
S
Table 7.
RF characteristics
Test signal: 2-carrier W-CDMA, 3GPP test model 1; 64 DPCH; PAR = 7.2 dB at 0.01 % probability
on the CCDF; f
1
= 2502.5 MHz; f
2
= 2507.5 MHz; f
3
= 2692.5 MHz; f
4
= 2697.5 MHz;
RF performance at V
DS
= 28 V; I
Dq
= 900 mA; T
case
= 25
C; unless otherwise specified; in a
class-AB production test circuit.
Symbol
G
p
D
RL
in
ACPR
5M
Parameter
power gain
drain efficiency
input return loss
adjacent channel power ratio (5 MHz)
Conditions
P
L(AV)
= 25 W
P
L(AV)
= 25 W
P
L(AV)
= 25 W
P
L(AV)
= 25 W
Min
15.8
25
-
-
Typ
17
28
10
32
Max
-
-
-
26
Unit
dB
%
dB
dBc
7. Test information
7.1 Ruggedness in class-AB operation
The BLF8G27LS-100V and BLF8G27LS-100GV are capable of withstanding a load
mismatch corresponding to VSWR = 10 : 1 through all phases under the following
conditions: V
DS
= 28 V; I
Dq
= 900 mA; P
L
= 100 W; f = 2500 MHz.
BLF8G27LS-100V_27LS-100GV#5
All information provided in this document is subject to legal disclaimers.
© Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet
Rev. 5 — 1 September 2015
3 of 14
BLF8G27LS-100(G)V
Power LDMOS transistor
7.2 Impedance information
Table 8.
Typical impedance
Measured load-pull data; I
Dq
= 900 mA; V
DS
= 28 V (main transistor).
f
(MHz)
BLF8G27LS-100V
2500
2600
2700
BLF8G27LS-100GV
2500
2600
2700
[1]
Z
S
and Z
L
defined in
Figure 1.
Z
S[1]
()
1.2
j4.6
2.3
j5.5
3.8
j5.2
1.7
j7.4
2.8
j8.0
4.0
j7.9
Z
L[1]
()
2.7
j2.7
2.5
j2.5
2.1
j2.6
2.4
j4.9
2.2
j5.2
2.0
j5.3
drain
Z
L
gate
Z
S
001aaf059
Fig 1.
Definition of transistor impedance
7.3 VBW in class-AB operation
The BLF8G27LS-100V and BLF8G27LS-100GV show 110 MHz (typical) video bandwidth
in class-AB test circuit in 2.6 GHz band at V
DS
= 28 V and I
Dq
= 0.9 A.
BLF8G27LS-100V_27LS-100GV#5
All information provided in this document is subject to legal disclaimers.
© Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet
Rev. 5 — 1 September 2015
4 of 14
BLF8G27LS-100(G)V
Power LDMOS transistor
7.4 Test circuit
C10
C1
R1
C5
C3
R2
C6
C9
C2
C4
C7
C8
C11
aaa-005639
Printed-Circuit Board (PCB): Rogers RO4350B;
r
= 3.5; thickness = 0.762 mm.
See
Table 9
for list of components.
Fig 2.
Component layout for test circuit
Table 9.
List of components
For test circuit, see
Figure 2.
Component
C1, C2, C9
C3, C4, C6, C8
C5, C7
C10, C11
R1, R2
Description
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
electrolytic capacitor
chip resistor
Value
20 pF
10
F
0.1
F
1000
F,
100 V
9.1
Vishay Dale SMD 0805
Remarks
ATC600F
Murata
Murata
BLF8G27LS-100V_27LS-100GV#5
All information provided in this document is subject to legal disclaimers.
© Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet
Rev. 5 — 1 September 2015
5 of 14
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