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NLU2G07MUTCG

Description
Buffers & Line Drivers HS CMOS DUAL NON-INV BUFFER W/ OPEN DRAIN
Categorylogic    logic   
File Size70KB,7 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
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NLU2G07MUTCG Overview

Buffers & Line Drivers HS CMOS DUAL NON-INV BUFFER W/ OPEN DRAIN

NLU2G07MUTCG Parametric

Parameter NameAttribute value
Brand NameON Semiconductor
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerON Semiconductor
Parts packaging codeDFN
package instruction1.20 X 1 MM, 0.40 MM PITCH, LEAD FREE, UDFN-6
Contacts6
Manufacturer packaging code517AA
Reach Compliance Codecompliant
Factory Lead Time1 week
series2G
JESD-30 codeR-PDSO-N6
JESD-609 codee4
length1.2 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeBUFFER
MaximumI(ol)0.004 A
Humidity sensitivity level1
Number of functions2
Number of entries1
Number of terminals6
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output characteristicsOPEN-DRAIN
Package body materialPLASTIC/EPOXY
encapsulated codeVSON
Encapsulate equivalent codeSOLCC6,.04,16
Package shapeRECTANGULAR
Package formSMALL OUTLINE, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
power supply1.8/5 V
Prop。Delay @ Nom-Sup10 ns
propagation delay (tpd)14.5 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height0.55 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formNO LEAD
Terminal pitch0.4 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width1 mm
NLU2G07
Dual Non-Inverting Buffer,
Open Drain
The NLU2G07 MiniGatet is an advanced high−speed CMOS dual
non−inverting buffer with open drain output in ultra−small footprint.
The NLU2G07 input and output structures provide protection when
voltages up to 7.0 V are applied, regardless of the supply voltage.
Features
www.onsemi.com
MARKING
DIAGRAMS
UDFN6
1.0 x 1.0
CASE 517BX
1
UDFN6
1.2 x 1.0
CASE 517AA
1
UDFN6
1.45 x 1.0
CASE 517AQ
1
E
M
= Device Marking
= Date Code
XM
High Speed: t
PD
= 3.8 ns (Typ) @ V
CC
= 5.0 V
Low Power Dissipation: I
CC
= 1
mA
(Max) at T
A
= 25°C
Power Down Protection Provided on inputs
Balanced Propagation Delays
Overvoltage Tolerant (OVT) Input and Output Pins
Ultra−Small Packages
These are Pb−Free Devices
EM
XM
IN A1
1
6
OUT Y1
GND
2
5
V
CC
IN A2
3
4
OUT Y2
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Figure 1. Pinout
(Top View)
IN A1
IN A2
1
1
OUT Y1
OUT Y2
Figure 2. Logic Symbol
PIN ASSIGNMENT
1
2
3
4
5
6
IN A1
GND
IN A2
OUT Y2
V
CC
OUT Y1
FUNCTION TABLE
A
L
H
Y
L
Z
©
Semiconductor Components Industries, LLC, 2016
1
July, 2016 − Rev. 5
Publication Order Number:
NLU2G07/D
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