Features
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Integrates a 64-slot Digital Signal Processor (DSP), 16-bit Processor, 24K x 16 On-chip
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Flash Memory, 2K x 16 RAM, 64 Individually Programmable I/O Pins
Alternate Group Selectable I/O Pins Allow External Memory Expansion, Host Parallel
I/O, Serial MIDI_IN/MIDI_OUT, Additional Digital Audio-in/out
Up to 64 Voices Polyphony, 24 dB Resonant Filter Per Voice, User Programmable
Synthesis/Processing Algorithms
Three Timers, One Timer Being Available for Orchestrations Tempo Control
Ideal for Battery Operation
3V to 4.5V Power Supply
Power-down Mode
Parameters Can Be Saved Into Built-in Flash Memory on a Single Word Write Basis.
Compatible with ATSAM97xx Series Design Tools and Debugger
Quick Time to Market
Proven Reliable Synthesis Drivers
In-circuit Emulation with Code View Debugger for Easy Prototype Development
Built-in Flash Programming Algorithm
Low frequency Input Clock at 256xFs Minimizes RFI, Built-in PLL Raises Frequency
Internally
PQFP100 Easy Mount Standard Package (Pitch 0.65 mm)
Atmel Standard Flash Technology
Sound
Synthesis
ATSAM9743
Single-chip
Music System
Description
The ATSAM9743 integrates into a single chip an ATSAM97xx core (64-slot DSP + 16-
bit processor), a 24K x 16 Flash memory, a 2K x 16 RAM, and up to 64 individually
programmable I/O pins. With the addition of a single external digital-to-analog con-
verter or a codec, the ATSAM9743 can be used in a variety of musical and sound
processing applications, like low-cost keyboards, equalizers and effect processors.
I/O pins can be configured for external memory expansion, allowing more sophisti-
cated products with up to 4M bytes RAM or ROM.
Figure 1.
Typical Application of the ATSAM9743
Keyboard
Switches
LEDS
LCD Display
MIDI_IN/MIDI_OUT
ATSAM9743
DAC
Rev. 1773B-DRMSD–11/02
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Principal Elements
Key Circuitry in a
Single Chip
The ATSAM9743 provides a new generation of integrated solutions for electronic musical
instruments and sound processors. The ATSAM9743 places all key circuitry onto a single sili-
con chip: sound synthesizer/processor, 16-bit control processor, 24K x 16 Flash memory, 2K x
16 RAM, and up to 64 individually programmable I/O pins allowing direct interface with key-
board, switches, LCD display, etc.
The synthesis/sound processing core of the ATSAM9743 is taken from the ATSAM97xx
series, whose quality has already been demonstrated through dozens of different musical
products such as electric pianos, home keyboards, professional keyboards, classical organs,
sound expanders and effect devices. The maximum polyphony is 64 voices without effects. A
typical application will be 38-voice polyphony with reverb, chorus, 4-band equalizer and
surround.
Configuration options allow the ATSAM9743 to cover a wide range of products, from the low-
est cost keyboard to the high range multi-effect processor. Thanks to flexible external memory
expansion, up to 4M bytes additional external memory can be used for firmware, orchestra-
tions, PCM data or delay lines. The external memory can be ROM, RAM or Flash. The internal
Flash memory can be programmed on-board from the ATSAM9743 itself by a Flash program-
ming algorithm, which resides in internal ROM on chip.
The ATSAM9743 operates from a single 8 MHz crystal. A built-in PLL multiplies by 4 the crys-
tal frequency for internal processing. This minimizes radio frequency interference (RFI),
making it easier to comply with FCC, CSA and CE standards.
The ATSAM9743 is very suitable for battery-operated products:
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Quick Time to Market
A power-down feature is included which can be controlled externally (PDWN/ pin).
Built-in Flash memory words can be individually programmed by the firmware itself.
Operational voltage is from 3V to 5.5V (I/O).
ATSAM97xx Series
Processing Core
External Memory
Expansion
Standard Compliance
Made Easier
Battery Powered
Usage
The ATSAM9743 has been designed with final instrument quick time-to-market in mind. The
ATSAM9743 product development program includes key features to minimize product devel-
opment efforts:
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Specialized debug interface, providing on-target software development with a source code
CodeView debugger.
Standard sound generation/processing firmware.
Windows
®
tools for sounds, soundbanks and orchestration developments.
Standard soundbanks.
Comprehensive technical support available directly from Atmel.
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ATSAM9743
1773B–DRMSD–11/02
ATSAM9743
Internal
Architecture
The highly-integrated architecture of the ATSAM9743 combines a specialized high-perfor-
mance RISC-based digital signal processor (DSP) and a general-purpose 16-bit CISC-based
control processor (P16). An on-chip memory management unit (MMU) allows the DSP and the
control processor to share an internal 24K x 16 Flash memory, 2K x 16 RAM, as well as
optional external ROM and/or RAM memory devices configured through the Ports & Flash
control registers.
An intelligent peripheral I/O interface function handles other I/O interfaces, such as the on-chip
MIDI UART and three timers, with minimum intervention from the control processor.
Four 16-bit I/O ports can have their bits individually configured as inputs or outputs, they can
also be assigned alternate functions such as external memory access (address, data and con-
trol signals), 8-bit parallel MIDI port, serial MIDI_IN/MIDI_OUT, and additional digital audio-
in/out.
See Table 2 on page 5 and Table 3 on page 6 for details.
Figure 2.
Diagram of the Internal Architecture of the ATSAM9743
CLBD
WSBD
DABD0
64-Slot DSP
with
Alogrithms in RAM
Flash
24K x 16
RAM
2K x 16
P16
Processor
256 x 16 RAM
1K x 16 ROM
X1, X2, LFT
RESET
PDWN
CKOUT
MIDI UART
3 x Timers
Standard ATSAM97xx
Control Registers
Memory
Manager
Unit
Ports & Flash
Control Registers
P0[15:0]
P1[15:0]
P2[15:0]
P3[15:0]
Clock
&
PLL
DSP Engine
The DSP engine operates on a frame-timing basis with the frame subdivided into 64 process
slots. Each process is itself divided into 16 microinstructions known as “algorithms”. Up to 32
DSP algorithms can be stored on-chip in the Alg RAM memory, allowing the device to be pro-
grammed for a number of audio signal generation/processing applications.
The DSP engine is capable of generating 64 simultaneous voices using algorithms such as
wavetable synthesis with interpolation, alternate loop and 24 dB resonant filtering for each
voice. Slots may be linked together (ML RAM) to allow implementation of more complex syn-
thesis algorithms.
A typical musical instrument application will use a little more than half the capacity of the DSP
engine for synthesis, thus providing state-of-the-art 38-voice synthesis polyphony. The
remaining processing power may be used for typical functions like reverberation, chorus, sur-
round effect, equalizer, etc.
Frequently accessed DSP parameter data are stored in five banks of on-chip RAM memory.
Sample data, which is accessed relatively infrequently, can be stored in the built-in Flash
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1773B–DRMSD–11/02
memory, or in external ROM. The combination of localized micro-program memory and local-
ized parameter data allows microinstructions to execute in 31 ns (32 MIPS). Separate buses
from each of the on-chip parameter RAM memory banks allow highly parallel data movement
to increase the effectiveness of each microinstruction. With this architecture, a single microin-
struction can accomplish up to 6 simultaneous operations (add, multiply, load, store, etc.),
providing a potential throughput of 192 million operations per second (MOPS).
P16 Control
Processor and I/O
Functions
The P16 control processor is a general-purpose 16-bit CISC processor core, which runs from
external memory. A debug ROM is included on-chip for easy development of firmware directly
on the target system. This ROM also contains the necessary code to directly program the
built-in Flash memory. The P16 includes 256 words of local RAM data memory for use as reg-
isters, scratchpad data and stack.
The P16 control processor writes to the parameter RAM blocks within the DSP core in order to
control the synthesis process. In a typical application, the P16 control processor parses and
interprets incoming commands from the MIDI UART and then controls the DSP by writing into
the parameter RAM banks in the DSP core. Slowly changing synthesis functions, such as
LFOs, are implemented in the P16 control processor by periodically updating the DSP param-
eter RAM variables.
The P16 control processor interfaces with other peripheral devices, such as the system control
and status registers, the on-chip MIDI UART, the on-chip timers and the Ports & Flash control
registers through specialized “intelligent” peripheral I/O logic. This I/O logic automates many of
the system I/O transfers to minimize the amount of overhead processing required from the
P16.
Memory
Management Unit
(MMU)
The Memory Management Unit (MMU) block allows Flash and/or RAM memory resources to
be shared between the synthesis/DSP and the P16 control processor. This allows the single
built-in Flash memory to serve as sample memory storage for the DSP and as program stor-
age for the P16 control processor. An internal 2K x 16 RAM is also connected to the MMU,
allowing RAM resources to be shared between the DSP and the P16. Similarly, when using
external memory, corresponding memory resources can be shared between the DSP and the
P16.
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ATSAM9743
1773B–DRMSD–11/02
ATSAM9743
Pin Description
Pins by Function
Table 1.
Power Supply
Pin Name
GND
VC3
VCC
Note:
Pin Number
5, 10, 18, 22, 33, 45, 47, 59, 62, 75, 88, 99
3, 11, 21, 27, 61
17, 31, 46, 57, 73, 87, 100
Type
PWR
PWR
PWR
Function
Digital Ground: All pins should be connected to a
ground plane
Core Power Supply, 3V to 3.8V:
All pins should be connected
I/O Power Supply, 3V to 5.5V:
All pins should be connected to a VCC plane
Power supply decoupling: Like all high speed HCMOS ICs, proper decoupling is mandatory for reliable operation and RFI reduc-
tion. The recommended decoupling is 100 nF at each corner of the IC with an additional 10 µFT bulk capacitor close to the X1,
X2 pins.
Table 2.
Single Function Pins
Pin Name
CLBD
WSBD
DABD0
P3.12 - P3.14
X1
Pin Number
26
37
35
81, 23, 24
13
Type
OUT
OUT
OUT
Programmable
IN
Function
External DAC serial bit clock
External DAC left/right clock
External DAC serial stereo audio data
General purpose I/O
Crystal connection, or external clock input at
256*Fs, Fs being the sampling frequency. When
used as an input, a 330 ohms serial resistor
should be inserted. Typical crystal frequency is
8 MHz (Fs = 32 kHz)
Other end of crystal connection. Cannot be used
to drive external circuitry.
Buffered X2 output, can be used to drive external
circuits, such as Sigma/Delta DACs
Built-in PLL compensation filter input
Master reset, active low, has built-in Schmitt
trigger.
Power down, active low
Test pins. Should be grounded for normal
operation.
TEST0 is used to start the built-in debugger.
In this case TEST2 specifies the communication
baud rate.
X2
CKOUT
LFT
RESET
PDWN
TEST[2:0]
14
95
12
15
16
42 - 44
OUT
OUT
Analog
IN
IN
IN
Note:
Pin names exhibiting an overbar (PDWN for example) indicate that the signal is active low.
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