Changes to HDMI Specifications Parameter, Table 3...................7
Change to Maximum Junction Temperature (T
J_MAX
), Table 5 ....... 10
Changes to Package Thermal Performance Section .................. 10
Changes to ADV7441A Evaluation Platform Section ............... 24
Changes to Table 13 ....................................................................... 24
Changes to Figure 11...................................................................... 24
Changes to Ordering Guide .......................................................... 25
7/08—Revision B: Initial Version
VBI DATA PROCESSOR
VBI
DECODER
ANCILLARY
DATA
FORMATTER
ANCILLARY
DATA
Data Sheet
ANALOG INTERFACE
ADC 0
CHA
DATA
PROCESSOR
EMBEDDED
SYNC
SYNC SOURCE
AND
POLARITY DETECT
STANDARD
IDENTIFICATION
AV
CODE
INSERTION
MACROVISION AND
CGMS DETECTION
PROGRAM
DELAY
DIGITIAL
FINE
CLAMP
GAIN
CONTROL
OFFSET
ADDER
SYNC EXTRACT
10
COMPONENT PROCESSOR
DIGITAL PROCESSING BLOCK
CVBS
CLAMP
RGB
ADC 1
CHB
CLAMP
10
INPUT
MATRIX
ADC 2
10
YPrPb
CLAMP
PIXEL
DATA
10
P0 TO P9
10
P10 TO P19
10
P20 TO P29
FUNCTIONAL BLOCK DIAGRAM
YC AND
CVBS
HS/CS, VS
CONTROL
CONTROL
C
Y
NOISE AND
CALIBRATION
DECIMATION AND
DOWNSAMPLING
FILTERS
CLAMP
ADC 3
10
CHC
COLOR-SPACE
CONVERTER
CHA
CHD
CHB
CHC
SOG
SOY
HS_IN/CS_IN
VS_IN
LLC
GENERATION
ACTIVE PEAK AND
HSYNC DEPTH
SYNC PROCESSING
AND CLOCK
GENERATION
MUX
Figure 1.
CONTROL AND DATA
CONTROL
FILTER
SYNC
EXTRACT
LUMA
DIGITAL
FINE
CLAMP
LUMA
FILTER
FSC
RECOVERY
STANDARD DEFINITION PROCESSOR
OUTPUT FORMATTER
G
B
R
FB
FB
RXA_C
4:2:2 TO 4:4:4
CONVERSION
MUX
HDMI DECODE
DATA RECOVERY
ALIGNMENT
RXB_C
HS
CHROMA
DIGITAL
FINE
CLAMP
RXB_0
RXB_1
SAMPLER
VBI DATA
RECOVERY
GLOBAL
CONTROL
MACROVISION
DETECTION
STANDARD
AUTODETECTION
SYNTHESIZED
LLC CONTROL
FREE RUN
OUTPUT CONTROL
EQUALIZER MUX EQUALIZER
HDCP
ENGINE
EDID/REPEATER
CONTROLLER
HDCP
EEPROM
MDA
MCL
PACKET
PROCESSOR
RXB_2
DDCA_SCL
DDCA_SDA
DDCB_SDA
DDCB_SCL
06914-001
ADV7441A
PACKET/
INFOFRAME
MEMORY
AUDIO
PROCESSING
I
2
S
LRCLK
SCLK
MCLKOUT
SPDIF
FAST BLANK OVERLAY CONTROL
PLL
VS
XOR
Rev. H | Page 3 of 28
DE
CHROMA
DEMOD
CHROMA
FILTER
SCL
SDA
GAIN
CONTROL
LUMA
RE-
SAMPLE
LUMA
2D COMB
(0x04 MAX)
INT1
CONTROL
INTERFACE
I
2
C
ALSB
LINE
LENGTH
PREDICTOR
RE-
SAMPLE
CONTROL
AV
CODE
INSERTION
HS/CS
VS/FIELD
DE/FIELD
CTI
C-DNR
RXA_0
RXA_1
SAMPLER
RXA_2
LLC
GAIN
CONTROL
CHROMA
RE-
SAMPLE
CHROMA
2D COMB
(0x04 MAX)
SFL/
SYNC_OUT/
INT2
ADV7441A
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Data Sheet
AVDD = 1.71 V to 1.89 V, DVDD = 1.62 V to 1.98 V, DVDDIO = 2.97 V to 3.63 V, PVDD = 1.71 V to 1.89 V, TVDD = 3.135 V to 3.465 V,
CVDD = 1.71 V to 1.89 V. Operating temperature range is −40°C to +85°C, unless otherwise noted.
Table 1.
Parameter
1
STATIC PERFORMANCE
2
Resolution (Each ADC)
Integral Nonlinearity
Symbol
N
INL
Test Conditions
Min
Typ
Max
10
BSL 27 MHz (@ a 10-bit level)
BSL 54 MHz (@ a 10-bit level)
BSL 74 MHz (@ a 10-bit level)
BSL 110 MHz (@ a 10-bit level)
BSL 170 MHz (@ an 8-bit level)
At 27 MHz (@ a 10-bit level)
At 54 MHz (@ a 10-bit level)
At 74 MHz (@ a 10-bit level)
At 110 MHz (@ a 10-bit level)
At 170 MHz (@ an 8-bit level)
2
0.7
0.8
0.3
+60
+10
10
−0.5/+2
−0.5/+2
−0.5/+1.5
−0.7/+2
−0.25/+0.5
−0.5/+0.5
±0.5
±0.5
±0.5
−0.25/+0.2
Unit
Bits
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
V
V
V
V
µA
µA
pF
V
V
µA
pF
V
V
V
V
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Differential Nonlinearity
DNL
DIGITAL INPUTS
Input High Voltage
3
Input Low Voltage
Input Current
Input Capacitance
4
DIGITAL OUTPUTS
Output High Voltage
5
Output Low Voltage
5
High Impedance Leakage Current
Output Capacitance
4
POWER REQUIREMENTS
4
Digital Core Power Supply
Digital I/O Power Supply
PLL Power Supply
Analog Power Supply
Terminator Power Supply
Comparator Power Supply
Digital Core Supply Current
3
V
IH
HS_IN/CS_IN, VS_IN low trigger mode
V
IL
I
IN
C
IN
V
OH
V
OL
I
LEAK
C
OUT
DVDD
DVDDIO
PVDD
AVDD
TVDD
CVDD
I
DVDD
I
SOURCE
= 0.4 mA
I
SINK
= 3.2 mA
HS_IN/CS_IN, VS_IN low trigger mode
Pin 21 (RESET)
All input pins other than Pin 21
−60
−10
2.4
0.4
10
20
1.62
2.97
1.71
1.71
3.135
1.71
1.8
3.3
1.8
1.8
3.3
1.8
140
141
152
203
242
242
16
17
16
42
17
20
1.98
3.63
1.89
1.89
3.465
1.89
198
290
218
305
358
414
48
80
50
136
192
151
Digital I/O Supply Current
I
DVDDIO
CVBS input sampling @ 54 MHz
6, 7
Graphics RGB sampling @ 108 MHz
6, 7
SCART RGB fast blank sampling @ 54 MHz
6, 7
YPrPb 1080p sampling @ 148.5 MHz
6, 7
HDMI RGB sampling @ 165 MHz
7, 8, 9
HDMI RGB sampling @ 225 MHz
7, 8, 9
CVBS input sampling @ 54 MHz
6, 7
Graphics RGB sampling @ 108 MHz
6, 7
SCART RGB fast blank sampling @ 54 MHz
6, 7
YPrPb 1080p sampling @ 148.5 MHz
6, 7
HDMI RGB sampling @ 165 MHz
7, 8, 9
HDMI RGB sampling @ 225 MHz
7, 8, 9, 10
Rev. H | Page 4 of 28
Data Sheet
Parameter
1
HDMI Comparators
TMDS PLL and Equalizer
Supply Current
Symbol
I
CVDD
Test Conditions
CVBS input sampling @ 54 MHz
6, 7
Graphics RGB sampling @ 108 MHz
6, 7
SCART RGB fast blank sampling @ 54 MHz
6, 7
YPrPb 1080p sampling @ 148.5 MHz
6, 7
HDMI RGB sampling @ 165 MHz
7, 8, 9
HDMI RGB sampling @ 225 MHz
7, 8, 9
CVBS input sampling @ 54 MHz
6, 7
Graphics RGB sampling @ 108 MHz
6, 7
SCART RGB fast blank sampling @ 54 MHz
6, 7
YPrPb 1080p sampling @ 148.5 MHz
6, 7
HDMI RGB sampling @ 165 MHz
7, 8, 9
HDMI RGB sampling @ 225 MHz
7, 8, 9
CVBS input sampling @ 54 MHz
6, 7
Graphics RGB sampling @ 108 MHz
6, 7
SCART RGB fast blank sampling @ 54 MHz
6, 7
YPrPb 1080p sampling @ 148.5 MHz
6, 7
HDMI RGB sampling @ 165 MHz
7, 8, 9, 12
HDMI RGB sampling @ 225 MHz
7, 8, 9, 12
CVBS input sampling @ 54 MHz
6, 7
Graphics RGB sampling @ 108 MHz
6, 7
SCART RGB fast blank sampling @ 54 MHz
6, 7
YPrPb 1080p sampling @ 148.5 MHz
6, 7
HDMI RGB sampling @ 165 MHz
7, 8, 9
HDMI RGB sampling @ 225 MHz
7, 8, 9
Min
Typ
56
56
56
56
86
95
63
174
225
180
0
0
12
12
12
12
42
63
18
14
17
19
10
15
11.6
25
ADV7441A
Max
83
83
83
83
111
125
115
312
388
318
2
2
20
20
20
20
97
100
24
22
24
25
20
21
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
ms
Analog Supply Current
11
I
AVDD
Terminator Supply Current
I
TVDD
Audio and Video PLL Supply Current
I
PVDD
Power-Down Current
Power-Up Time
1
2
I
PWRDN
t
PWRUP
The minimum/maximum specifications are guaranteed over the −40°C to +85°C temperature range (T
MIN
to T
MAX
).
All ADC linearity tests were performed at input range full scale − 12.5% and at zero scale + 12.5%.
3
Pin 1, Pin 105, Pin 106, and Pin 144 are 5 V tolerant.
4
Guaranteed by characterization.
5
The V
OH
and V
OL
levels were obtained using the default drive strength value (0x15) in User Map Register 0xF4.
6
Current measurements for analog inputs were made with HDMI/analog simultaneous mode disabled (User Map Register 0xBA, Bit 7, programmed with Value 0) and
with no HDMI sources connected to the part.
7
Typical current measurements were taken with nominal voltage supply levels and an SMPTE bar video pattern input. Maximum current measurements were taken
with maximum rating voltage supply levels and a MoiréX video pattern input.
8
Current measurements for HDMI inputs were made with a source connected to the active HDMI port and with no source connected to the inactive HDMI port.
9
Audio stream is an uncompressed stereo audio sampling frequency of f
S
= 48 kHz, and MCLKOUT = 256 f
S
.
10
The maximum I
DVDDIO
value for the HDMI RGB sampling @ 225 MHz appears lower than expected. This is due to the 1080p 12-bit deep color mode input used during
evaluation. In this mode, the input HDMI TMDS clock has a frequency of 222.75 MHz; however, the output pixel clock is stepped down to 148.5 MHz to account for the
extra bits of data. DVDDIO power is proportional to the output pixel clock, therefore the stepping down of the output pixel clock data in 1080p 12-bit deep color
mode results in lower than expected I
DVDDIO
.
11
Analog current measurements for CVBS were made with only ADC0 powered up; for RGB, with only ADC0, ADC1, and ADC2 powered up; for SCART FB, with all ADCs
powered up; and for HDMI mode, with all ADCs powered off.
12
The terminator supply current may vary with the HDMI source in use.
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