Data Sheet
FEATURES
Precision Analog Microcontroller, 12-Bit
Analog I/O, ARM7TDMI MCU
ADuC7019/20/21/22/24/25/26/27/28/29
On-chip peripherals
UART, 2× I
2
C and SPI serial I/O
Up to 40-pin GPIO port
1
4× general-purpose timers
Wake-up and watchdog timers (WDT)
Power supply monitor
3-phase, 16-bit PWM generator
1
Programmable logic array (PLA)
External memory interface, up to 512 kB
1
Power
Specified for 3 V operation
Active mode: 11 mA at 5 MHz, 40 mA at 41.78 MHz
Packages and temperature range
From 40-lead 6 mm × 6 mm LFCSP to 80-lead LQFP
1
Fully specified for –40°C to +125°C operation
Tools
Low cost QuickStart development system
Full third-party support
Analog I/O
Multichannel, 12-bit, 1 MSPS ADC
Up to 16 ADC channels
1
Fully differential and single-ended modes
0 V to V
REF
analog input range
12-bit voltage output DACs
Up to 4 DAC outputs available
1
On-chip voltage reference
On-chip temperature sensor (±3°C)
Voltage comparator
Microcontroller
ARM7TDMI core, 16-bit/32-bit RISC architecture
JTAG port supports code download and debug
Clocking options
Trimmed on-chip oscillator (±3%)
External watch crystal
External clock source up to 44 MHz
41.78 MHz PLL with programmable divider
Memory
62 kB Flash/EE memory, 8 kB SRAM
In-circuit download, JTAG-based debug
Software-triggered in-circuit reprogrammability
APPLICATIONS
Industrial control and automation systems
Smart sensors, precision instrumentation
Base station systems, optical networking
FUNCTIONAL BLOCK DIAGRAM
12-BIT
DAC
ADC0 TO ADC4,
ADC12 TO ADC14
MUX
1MSPS
12-BIT ADC
DAC0
ADuC7019
12-BIT
DAC
12-BIT
DAC
DAC1
ADC15
CMP0
CMP1
CMP
OUT
V
REF
OSC
AND PLL
PSM
RST
TEMP
SENSOR
DAC2
BAND GAP
REF
XCLKI
XCLKO
ARM7TDMI-BASED MCU WITH
ADDITIONAL PERIPHERALS
PLA
2k × 32 SRAM
31k × 16 FLASH/EEPROM
SERIAL I/O
UART, SPI, I
2
C
GPIO
3-PHASE
PWM
(SEE NOTE 1)
POR
4 GENERAL-
PURPOSE TIMERS
JTAG
NOTES
1. SEE APPLICATION NOTE AN-798.
Figure 1.
1
Depending on part model. See Ordering Guide for more information.
Document Feedback
Rev. H
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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Tel: 781.329.4700 ©2005–2018 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
04955-100
ADuC7019/20/21/22/24/25/26/27/28/29
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 3
General Description ......................................................................... 5
Detailed Block Diagram ............................................................ 10
Specifications................................................................................... 11
Timing Specifications ................................................................ 14
Absolute Maximum Ratings.......................................................... 21
ESD Caution ................................................................................ 21
Pin Configurations and Function Descriptions ......................... 22
ADuC7019/ADuC7020/ADuC7021/ADuC7022 .................. 22
ADuC7024/ADuC7025 ............................................................. 26
ADuC7026/ADuC7027 ............................................................. 29
ADuC7028 ................................................................................... 32
ADuC7029 ................................................................................... 34
Typical Performance Characteristics ........................................... 36
Terminology .................................................................................... 39
ADC Specifications .................................................................... 39
DAC Specifications..................................................................... 39
Overview of the ARM7TDMI Core ............................................. 40
Thumb Mode (T)........................................................................ 40
Long Multiply (M) ...................................................................... 40
EmbeddedICE (I) ....................................................................... 40
Exceptions ................................................................................... 40
ARM Registers ............................................................................ 40
Interrupt Latency ........................................................................ 41
Memory Organization ................................................................... 42
Memory Access ........................................................................... 42
Flash/EE Memory ....................................................................... 42
SRAM ........................................................................................... 42
Memory Mapped Registers ....................................................... 42
ADC Circuit Overview .................................................................. 46
Transfer Function ....................................................................... 46
Typical Operation ....................................................................... 47
MMRs Interface .......................................................................... 47
Converter Operation .................................................................. 49
Driving the Analog Inputs ........................................................ 50
Data Sheet
Calibration................................................................................... 51
Temperature Sensor ................................................................... 51
Band Gap Reference ................................................................... 51
Nonvolatile Flash/EE Memory ..................................................... 52
Programming .............................................................................. 52
Security ........................................................................................ 53
Flash/EE Control Interface ....................................................... 53
Execution Time from SRAM and Flash/EE ............................ 55
Reset and Remap ........................................................................ 55
Other Analog Peripherals .............................................................. 57
DAC.............................................................................................. 57
Power Supply Monitor ............................................................... 58
Comparator ................................................................................. 58
Oscillator and PLL—Power Control ........................................ 59
Digital Peripherals .......................................................................... 62
3-Phase PWM ............................................................................. 62
Description of the PWM Block ................................................ 63
General-Purpose Input/Output................................................ 68
Serial Port Mux ........................................................................... 71
UART Serial Interface ................................................................ 71
Serial Peripheral Interface ......................................................... 75
I
2
C-Compatible Interfaces......................................................... 77
Programmable Logic Array (PLA)........................................... 81
Processor Reference Peripherals................................................... 84
Interrupt System ......................................................................... 84
Timers .......................................................................................... 85
External Memory Interfacing ................................................... 90
Hardware Design Considerations ................................................ 94
Power Supplies ............................................................................ 94
Grounding and Board Layout Recommendations................. 95
Clock Oscillator .......................................................................... 95
Power-On Reset Operation ....................................................... 96
Typical System Configuration .................................................. 96
Development Tools......................................................................... 97
PC-Based Tools ........................................................................... 97
In-Circuit Serial Downloader ................................................... 97
Outline Dimensions ....................................................................... 98
Ordering Guide ........................................................................ 101
Rev. H | Page 2 of 102
Data Sheet
REVISION HISTORY
4/2018—Rev. G to Rev. H
Changes to General-Purpose Input/Output Section ..................68
Updated Outline Dimensions ........................................................98
Changes to Ordering Guide .........................................................101
12/2015—Rev. F to Rev. G
Changed CP-40-1 to CP-40-9 ........................................... Universal
Updated Outline Dimensions ........................................................97
Deleted Figure 96 (CP-40-1); Renumbered Sequentially ..........97
Changes to Ordering Guide .........................................................101
5/2013—Rev. E to Rev. F
Changes to Figure 1........................................................................... 1
Added Figure 2 to Figure 10; Renumbered Sequentially ............. 4
Changes to Figure 19; Added Figure 20 .......................................21
Changes to EPAD Note in Figure 21 and Figure 22 ..................... 22
Changes to EPAD Note in Table 11................................................... 23
Changes to EPAD Note in Figure 23 ............................................25
Changes to EPAD Note in Table 12 ..............................................26
Changes to Table 14 ........................................................................31
Changes to Table 15 ........................................................................33
Changes to Table 82 ........................................................................68
Added Table 83, Figure 73, Figure 74, Following Text, and
Table 84; Renumbered Sequentially ..............................................69
Changes to Bit 2 Description, Table 98 ........................................71
Changes to Table 101 ......................................................................72
Changes to Timer2 (Wake-Up Timer) Section ...........................87
Changes to Figure 94 ......................................................................95
Updated Outline Dimensions ........................................................97
Changes to Ordering Guide .........................................................101
7/2012—Rev. D to Rev. E
Changed SCLOCK to SCLK When Refering to SPI Clock,
SPIMISO to MISO when Refering to SPI MISO, SPIMOSI to
MOSI when Refering to SPI MOSI, and SPICSL to CS when
Refering to SPI Chip Select ............................................... Universal
Changes to Table 4, Table 5, and Figure 5 ....................................11
Changes to Endnote 1 in Table 6 and Figure 6 ............................12
Changes to Table 7 and Figure 7 ...................................................13
Changes to Table 8 and Figure 8 ...................................................14
Changes to Table 9 and Figure 9 ...................................................15
Changed EPAD Note in Figure 12 and Table 11 .........................18
Changed EPAD Note in Figure 13 and Table 12 .........................21
Changes to Bit 6 in Table 18...........................................................43
Changes to Example Source Code (External Crystal Selection)
Section and Example Source Code (External Clock Selection)
Section ..............................................................................................55
Changes to Serial Peripheral Interface Section ...........................69
Changes to SPICON[10] and SPICON[9] Descriptions in
Table 123............................................................................................70
Changes to Timer Interval Down Equation and Added Timer
Interval Up Equation ......................................................................79
ADuC7019/20/21/22/24/25/26/27/28/29
Added Hour:Minute:Second:1.128 Format Section ................... 80
Changes to Table 189 ...................................................................... 84
Removed CP-40-10 Package .......................................................... 92
Changes to Ordering Guide ........................................................... 96
5/2011—Rev. C to Rev. D
Changes to Table 4 .......................................................................... 11
Changes to Table 105 ...................................................................... 67
Updated Outline Dimensions........................................................ 91
Changes to Ordering Guide ........................................................... 94
12/2009—Rev. B to Rev. C
Added ADuC7029 Part ..................................................... Universal
Added Table Numbers and Renumbered Tables ............... Universal
Changes to Figure Numbers ............................................. Universal
Changes to Table 1 ............................................................................ 6
Changes to Figure 3 ......................................................................... 9
Changes to Table 3 and Figure 4 ................................................... 10
Changes to Table 10 ........................................................................ 16
Changes to Figure 55 ...................................................................... 53
Changes to Serial Peripheral Interface Section ........................... 69
Changes to Table 137 ...................................................................... 73
Changes to Figure 71 and Figure 72 ............................................. 85
Changes to Figure 73 and Figure 74 ............................................. 86
Updated Outline Dimensions........................................................ 91
Changes to Ordering Guide ........................................................... 94
3/2007—Rev. A to Rev. B
Added ADuC7028 Part ..................................................... Universal
Updated Format ................................................................. Universal
Changes to Figure 2 .......................................................................... 5
Changes to Table 1 ............................................................................ 6
Changes to ADuC7026/ADuC7027 Section ............................... 23
Changes to Figure 21 ...................................................................... 28
Changes to Figure 32 Caption ....................................................... 30
Changes to Table 14 ........................................................................ 35
Changes to ADC Circuit Overview Section ................................ 38
Changes to Programming Section ................................................ 44
Changes to Flash/EE Control Interface Section.......................... 45
Changes to Table 24 ........................................................................ 47
Changes to RSTCLR Register Section .......................................... 48
Changes to Figure 52 ...................................................................... 49
Changes to Figure 53 ...................................................................... 50
Changes to Comparator Section ................................................... 50
Changes to Oscillator and PLL—Power Control Section .......... 51
Changes to Digital Peripherals Section ........................................ 54
Changes to Interrupt System Section ........................................... 75
Changes to Timers Section ............................................................ 76
Changes to External Memory Interfacing Section ..................... 80
Added IOV
DD
Supply Sensitivity Section ..................................... 84
Changes to Ordering Guide ........................................................... 90
Rev. H | Page 3 of 102
ADuC7019/20/21/22/24/25/26/27/28/29
1/2006—Rev. 0 to Rev. A
Changes to Table 1 ............................................................................ 6
Added the Flash/EE Memory Reliability Section ....................... 43
Changes to Table 30 ........................................................................ 52
Changes to Serial Peripheral Interface ......................................... 66
Changes to Ordering Guide .......................................................... 90
10/2005—Revision 0: Initial Version
Data Sheet
Rev. H | Page 4 of 102
Data Sheet
GENERAL DESCRIPTION
The
ADuC7019/20/21/22/24/25/26/27/28/29
are fully integrated,
1 MSPS, 12-bit data acquisition systems incorporating high
performance multichannel ADCs, 16-bit/32-bit MCUs, and
Flash®/EE memory on a single chip.
The ADC consists of up to 12 single-ended inputs. An additional
four inputs are available but are multiplexed with the four DAC
output pins. The four DAC outputs are available only on certain
models (ADuC7020, ADuC7026, ADuC7028, and ADuC7029).
However, in many cases where the DAC outputs are not present,
these pins can still be used as additional ADC inputs, giving a
maximum of 16 ADC input channels. The ADC can operate in
single-ended or differential input mode. The ADC input voltage
is 0 V to V
REF
. A low drift band gap reference, temperature sensor,
and voltage comparator complete the ADC peripheral set.
Depending on the part model, up to four buffered voltage
output DACs are available on-chip. The DAC output range is
programmable to one of three voltage ranges.
ADuC7019/20/21/22/24/25/26/27/28/29
The devices operate from an on-chip oscillator and a PLL
generating an internal high frequency clock of 41.78 MHz
(UCLK). This clock is routed through a programmable clock
divider from which the MCU core clock operating frequency
is generated. The microcontroller core is an ARM7TDMI®,
16-bit/32-bit RISC machine, which offers up to 41 MIPS peak
performance. Eight kilobytes of SRAM and 62 kilobytes of
nonvolatile Flash/EE memory are provided on-chip. The
ARM7TDMI core views all memory and registers as a single
linear array.
On-chip factory firmware supports in-circuit serial download
via the UART or I
2
C serial interface port; nonintrusive emulation
is also supported via the JTAG interface. These features are
incorporated into a low cost QuickStart™ development system
supporting this MicroConverter® family.
The parts operate from 2.7 V to 3.6 V and are specified over an
industrial temperature range of −40°C to +125°C. When
operating at 41.78 MHz, the power dissipation is typically
120 mW. The
ADuC7019/20/21/22/24/25/26/27/28/29
are
available in a variety of memory models and packages (see
Ordering Guide).
ADC0 TO ADC4,
ADC12 TO ADC15
MUX
1MSPS
12-BIT ADC
12-BIT
DAC
DAC0
ADuC7020
12-BIT
DAC
12-BIT
DAC
12-BIT
DAC
DAC1
TEMP
SENSOR
CMP0
CMP1
CMP
OUT
V
REF
OSC
AND PLL
PSM
RST
PLA
BAND GAP
REF
DAC2
DAC3
XCLKI
XCLKO
ARM7TDMI-BASED MCU WITH
ADDITIONAL PERIPHERALS
2k × 32 SRAM
31k × 16 FLASH/EEPROM
SERIAL I/O
UART, SPI, I
2
C
GPIO
3-PHASE
PWM
(SEE NOTE 1)
POR
4 GENERAL-
PURPOSE TIMERS
JTAG
NOTES
1. SEE APPLICATION NOTE AN-798.
Figure 2. ADuC7020 Functional Block Diagram
Rev. H | Page 5 of 102
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