19-4841; Rev 8/09
DS2726EVKIT+
10-Cell Li-Ion Battery Protector
Evaluation Kit
www.maxim-ic.com
CONNECTING THE DS2726 EVALUATION KIT BOARD
Figure 1. CONNECTION DIAGRAM FOR DS2726EVKIT+
PACK+
BATT+
V10
V9
V8
V7
DS2726
EV Board
SLP
V5
V4
V3
V2
V1
VSS
BATT-
V0
10 Cell
Battery Pack
V6
CHARGER/
LOAD
+
-
VCC
V10 to V0 are voltage sense lines for the individual cells. For a 10-cell battery pack connect V10 to the positive
terminal of the pack. V9 will be connected to the positive terminal of the next cell and so on down to the last cell. V0
connects to the negative terminal of the battery pack. These connections are for voltage sense and cell balancing
only. The maximum amount of current they will sink is 200mA during cell balancing. The load current does not flow
through these connections. For a connection diagram of a battery pack with less than 10 cells, see Figure 1.
The BATT+ connection should be connected to the positive terminal of the battery pack. The path from PACK+ to
BATT+ is your charge and discharge current path. High currents will flow through this path therefore a heavy gauge
wire should be used.
BATT- should be connected to the negative terminal of the battery pack. VSS is the return current path for the load.
1 of 5
DS2726EVKIT+
Figure 2. CELL CONNECTION DIAGRAM FOR LESS THAN 10 CELLS
9 Cell
V10 = odd
V10
V9
V8
V7
V6
V5
V4
V3
V2
V1
V0
V10
V9
V8
V7
V6
V5
V4
V3
V2
V1
V0
8 Cell
V10 = even
V10
V9
V8
V7
V6
V5
V4
V3
V2
V1
V0
7 Cell
V10 = odd
V10
V9
V8
V7
V6
V5
V4
V3
V2
V1
V0
6 Cell
V10 = even
V10
V9
V8
V7
V6
V5
V4
V3
V2
V1
V0
5 Cell
V10 = odd
CHARGER CONNECTION
The positive terminal of the charge supply should be connected to the PAC+ terminal of the EV board. The
negative terminal of the charge supply should be connected to the negative terminal of your battery pack. This is a
high current path therefore a heavy gauge wire should be used. Also, SLEEP will need to be pulled to VCC when
the charger is connected. The DS2726 does not regulate charge current. Current should be regulated by the
charge supply.
NOTE:
The DC FET does not turn on below 2.8V per cell. When charging below 2.8V per cell the charge source
should charge at a lower rate to prevent damaging the DC FET. Once the per-cell voltage exceeds 2.8V, the DC
FET will enable and high current charge (fast charge) can begin.
CONFIGURATION
Overvoltage Threshold
The overvoltage threshold is set at the OVS1 and OVS2 pins through resistors R17, R18, R32, and R33. R17 and
R18 will pull OVS1 and OVS2 to VCC. R32 and R33 will pull OVS1 and OVS2 to VSS. V
IM
is achieved by floating
the pin.
Table 1
OVS0
OVS1
4.10
V
IL
V
IL
4.15
V
IM
V
IL
Nominal VOV Threshold (V)
4.20 4.25 4.30 4.35 4.40
V
IH
V
IL
V
IM
V
IH
V
IL
V
IL
V
IM
V
IM
V
IM
V
IH
4.45
V
IM
V
IH
4.50
V
IH
V
IH
Cell Balancing Voltage Threshold
The Cell Balancing Voltage Threshold is set at the CBS0 and CBS1 pins through resistors R15, R16, R30, and
R31. R15 and R16 will pull CBS0 and CBS1 to VCC. R30 and R31 will pull CBS0 and CBS1 to VSS. V
IM
is
achieved by floating the pin.
2 of 5
DS2726EVKIT+
Table 2
CBS0
CBS1
Cell balancing voltage:
Example:
V
OV
- V
CBTO
= V
CB
OVS0, OVS1, CBS0, and CBS1 = V
IH
4.5V - 0.4V = 4.1V
Cell balancing will begin when a cell’s voltage is greater than 4.1V and will terminate when all cells’ voltages are
greater than 4.1V.
Number of Cells
The number of cells in the battery pack is set at the SEL0 and SEL1 pins through resistors R12, R13, R27, and
R28. R12 and R13 will pull SEL0 and SEL1 to VCC. R27 and R28 will pull CBS0 and CBS1 to VSS. V
IM
is achieved
by floating the pin. See Figure 2 for proper connections to stacks with fewer than 10 cells.
Table 3
SEL0
SEL1
5
V
IL
V
IL
Number of Series Connected Cells
6
7
8
9
10
10
10
V
IM
V
IH
V
IL
V
IM
V
IH
V
IL
V
IM
V
IL
V
IL
V
IM
V
IM
V
IM
V
IH
V
IH
10
V
IH
V
IH
Cell Balancing Threshold Offset from VOV (V)
0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40
V
IL
V
IM
V
IH
V
IL
V
IM
V
IH
V
IL
V
IM
V
IH
V
IL
V
IL
V
IL
V
IM
V
IM
V
IM
V
IH
V
IH
V
IH
Discharge Overcurrent
The RDOC pin is a 1μA current sink. The R34 resistor sets the discharge overcurrent voltage threshold.
R34 x 1μA = V
DOC
The voltage seen at RDOC is sent to a comparator with the voltage seen at SNS. When V
RDOC
> V
SNS
the DC FET
will turn off. The voltage drop from Bat+ to the SNS pin is determined by the R
DS_ON
resistance of the DC FET. See
the FET section below for a description of R
DS_ON
and a link to the datasheet of the FET used the on EV board.
Short Circuit Overcurrent
The RSC pin is a 1μA current sink. The R35 resistor sets the short circuit voltage threshold.
R35 x 1μA = V
SC
The voltage seen at RSC is sent to a comparator with the voltage seen at SNS. When V
RSC
> V
SNS
the DC FET will
turn off. The voltage drop from Bat+ to the SNS pin is determined by the R
DS_ON
resistance of the DC FET. See the
FET
section for a description of R
DS_ON
and a reference to the data sheet of the FET used the on EV board.
Discharge Overcurrent Delay
The short circuit delay time is set using the capacitor C14 connected to the CDOCD pin. The short circuit delay
time is defined by the equation:
t
DOCD
= C
DOCD
x 32M
Short Circuit Overcurrent Delay
The short circuit delay time is set using the capacitor C15 connected to the CSCD pin. The short circuit delay time
is defined by the equation:
t
SCD
= C
SCD
x 500k
FET
The FETs used on the DS2726 EV board are Vishay SUM110P06-07L. Refer to the data sheet for details.
The R
DS_ON
rating of this FET is typ 5.5m at V
GS
= -10V. The EV kit board has two FETs in parallel, therefore, the
equivalent resistance is around 2.75m. Multiply R
DS_ON
times the desired DOC to get V
DOC
. Multiply R
DS_ON
times
the desired SC current to get V
SC
.
3 of 5
V5
SMAJ60A-13-F
Q3
SUM110P06-07L
Q4
SUM110P06-07L
J4
PACK+
1
V2
V3
1
SUM110P06-07L
Q1
J5
BATT+
SUM110P06-07L
Q2
SMAJ16CA-13-F
R21
150
C35
1uF
D2
C36
GND
C10
1uF
C20 C21 C22
NP NP NP
28
27
29
26
25
SMAJ16CA-13-F
R22 R23
150 150
C11
10uF
R24 R25
150 150
R26
15
GND
GND
C17
NP
NP
31
30
1uF
GND
C18 C19
NP
R34
120K
32
GND
R35
200K
R20
CC
NC
DC
V9
PKP
SNS
VIN
V10
C33
NP
C32
NP
C9
1uF
GND
L10
L9
24
2uH
2uH
R10 7.5
R9
7.5
1
1
V10
V9
J3
VCC
1
C34
C16
NP
2
RDOC
VCC
SEL0
SEL1
CDOCD
SLP
CBCFG
CBS0
CBS1
1
RSC
V8
V7
U1
DS2726
V6
V5
V4
V3
V2
V1
NC
GND
OVS0
OVS1
V0
9
10
14
15
12
SMAJ60A-13-F
V1
SMAJ16CA-13-F
11
13
16
Not Populated
Not Populated
Not Populated
Not Populated
Not Populated
Not Populated
4 of 5
R12 R13 R14 R15 R16 R17 R18
1K 1K
1K 1K 1K 1K
3
4
5
6
R19
7
8
CSCD
10K
0.1uF
(close to pins)
Not Populated
150
L8
23
22
21
20
19
18
17
L7
L6
L5
L4
L3
L2
L1
C24
NP
C1
1uF
GND
L0
2uH
2uH
2uH
2uH
2uH
2uH
2uH
2uH
2uH
R8
R7
R6
R5
R4
R3
R2
R1
R0
7.5
7.5
7.5
7.5
7.5
7.5
7.5
7.5
7.5
1
1
1
1
1
1
1
1
1
V8
V7
V6
V5
V4
V3
V2
V1
V0
R11
J2
SLEEP
1
C8
GND
1uF
C7
GND
1uF
C6
GND
1uF
C5
GND
1uF
C4
GND
1uF
C3
GND
1uF
C2
GND
1uF
C31
NP
C30
NP
C29
NP
C28
NP
C27
NP
C26
NP
C25
NP
1K
V4
C23
C0
1uF
NP
GND GND
C37
1uF
NP= Not Populated
C14 C15
102 102
104
C12
D1
R27 R28 R29 R30 R31 R32 R33
1K
C13
1uF
(short trace)
6.2V
J1
VSS
1
GND
DS2726EVKIT+
DS2726EVKIT+
REVISION HISTORY
REVISION
DATE
8/09
DESCRIPTION
Changed the ordering part number from DS2726K to DS2726EVKIT+.
PAGES
CHANGED
All
5 of 5
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses
are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
2009 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products.
京公网安备 11010802033920号
EEWORLD
