Intel® Server Board S5520UR and
S5520URT
Technical Product Specification
Intel order number E44031-012
Revision 1.9
May, 2011
Enterprise Platforms and Services Division - Marketing
Revision History
Intel® Server Board S5520UR and S5520URT TPS
Revision History
Date
March 2009
October 2009
January 2010
Revision
Number
1.0
1.1
1.2
Modifications
Initial Release.
Updated section 3.2 - Memory Subsystem.
Updated section 2.1 and added Security Feature for S5520URT.
Updated section 2.2.3 - NIC Connector.
Added section 3.9 Trusted Platform Module.
Updated section 2.1 - Intel Server Board S5520UR, S5520URT Feature Set.
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Updated section 3.1 - Intel Xeon Processor 5600 Series.
Updated section 3.2.4 - Memory RAS.
Updated section 3.2.5 - Memory Upgrade Rules.
Updated section 3.2.1 - Supported memory.
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March 2010
1.3
Arpil 2010
1.4
Updated section 2.2.1 - Server Board Connector and Component Layout.
Removed section 3.6.2 - Serial Port.
Removed CCC/WEEE.
Added section 3.9.3 - Intel Trusted Execution Technology (Intel TXT).
Updated section 3.7 - Video Support.
Updated section 3.3.2 - DDR3 Memory Configuration.
Updated section 2.1 - Intel Server Board S5520UR, S5520URT Feature Set.
Updated section 2 - Overview.
Updated section 2.1 - Intel Server Board S5520UR , S5520URT Feature Set.
Added section 5 – BIOS Setup Utility.
Updated section 3.5 – I/O Module.
Updated section 3.8 - Network Interface Controller (NIC).
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May 2010
July 2010
December 2010
1.5
1.6
1.7
1.8
May 2011
1.9
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Intel order number E44031-012
Revision 1.9
Intel® Server Board S5520UR and S5520URT
Disclaimers
Disclaimers
Information in this document is provided in connection with Intel products. No license, express or implied, by
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estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel ’s
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Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any
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express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to
fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property
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right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make
changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or
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“undefined”. Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or
incompatibilities arising from future changes to them.
The Intel Server Board S5520UR and S5520URT may contain design defects or errors known as errata which may
cause the product to deviate from published specifications. Current characterized errata are available on request.
Intel Corporation server boards contain a number of high-density VLSI and power delivery components that need
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adequate airflow to cool. Intel ’s own chassis are designed and tested to meet the intended thermal requirements of
these components when the fully integrated system is used together. It is the responsibility of the system integrator
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that chooses not to use Intel developed server building blocks to consult vendor datasheets and operating
parameters to determine the amount of airflow required for their specific application and environmental conditions.
Intel Corporation cannot be held responsible if components fail or the server board does not operate correctly when
used outside any of their published operating or non-operating limits.
Intel, Pentium, Itanium, and Xeon are trademarks or registered trademarks of Intel Corporation.
*Other brands and names may be claimed as the property of others.
Copyright © Intel Corporation 2008-2011.
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Revision 1.9
Intel order number E44031-012
iii
Table of Contents
Intel® Server Board S5520UR and S5520URT TPS
Table of Contents
1. Introduction ........................................................................................................................1
1.1
1.2
Chapter Outline ......................................................................................................1
Server Board Use Disclaimer .................................................................................1
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2. Overview .............................................................................................................................2
2.1
2.2
2.2.1
2.2.2
2.2.3
Intel Server Board S5520UR, S5520URT Feature Set .........................................2
Server Board Layout ..............................................................................................4
Server Board Connector and Component Layout ...................................................5
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Intel Server Board S5520UR, S5520URT Mechanical Drawings ..........................7
Server Board Rear I/O Layout ..............................................................................13
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Intel Xeon Processor ........................................................................................15
3. Functional Architecture ...................................................................................................14
3.1
3.1.1
3.1.2
3.1.3
3.1.4
3.1.5
3.2
3.2.1
3.2.2
3.2.3
3.2.4
3.2.5
3.3
3.4
3.4.1
3.4.2
3.4.3
3.5
3.6
3.6.1
3.6.2
3.6.3
Processor Support ...............................................................................................15
Turbo Mode ..........................................................................................................17
Hyperthreading.....................................................................................................17
Intel QuickPath Interconnect ..............................................................................17
Unified Retention System Support .......................................................................18
Memory Subsystem..............................................................................................19
Intel QuickPath Memory Controller .....................................................................19
Processor Cores, QPI Links and DDR3 Channels Frequency Configuration ........ 20
Publishing System Memory ..................................................................................25
Memory RAS ........................................................................................................26
Memory Upgrade Rules .......................................................................................29
Intel 5520 Chipset IOH .......................................................................................31
Intel
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82801Jx I/O Controller Hub (ICH10R).........................................................31
PCI Subsystem ....................................................................................................32
Serial ATA Support ..............................................................................................33
USB 2.0 Support ..................................................................................................33
I/O Module ...........................................................................................................34
Integrated Baseboard Management Controller .....................................................34
Integrated BMC Embedded LAN Channel ............................................................36
Floppy Disk Controller ..........................................................................................36
Keyboard and Mouse Support ..............................................................................36
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Intel order number E44031-012
Revision 1.9
Intel® Server Board S5520UR and S5520URT TPS
Table of Contents
3.6.4
3.7
3.7.1
3.7.2
3.8
3.8.1
3.9
3.9.1
3.9.2
3.9.3
3.10
Wake-up Control ..................................................................................................36
Video Support ......................................................................................................36
Video Modes ........................................................................................................36
Dual Video ...........................................................................................................37
Network Interface Controller (NIC) .......................................................................38
MAC Address Definition .......................................................................................38
Trusted Platform Module (TPM) – Supported only on S5520URT ........................ 39
Overview ..............................................................................................................39
TPM security BIOS...............................................................................................39
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Intel Trusted Execution Technology (Intel® TXT) ...............................................42
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Intel Virtualization Technology for Directed I/O (Intel VT-d) .............................. 45
4. Platform Management ......................................................................................................46
4.1
4.1.1
4.1.2
4.2
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
4.2.6
4.3
4.3.1
4.3.2
4.3.3
Feature Support ...................................................................................................48
IPMI 2.0 Features.................................................................................................48
Non-IPMI Features ...............................................................................................48
Optional Advanced Management Feature Support ............................................... 49
Enabling Advanced Management Features ..........................................................49
Keyboard, Video, Mouse (KVM) Redirection ........................................................49
Media Redirection ................................................................................................50
Web Services for Management (WS-MAN) ..........................................................51
Lightweight Directory Authentication Protocol (LDAP) .......................................... 51
Embedded Webserver .........................................................................................51
Management Engine (ME) ...................................................................................51
Overview ..............................................................................................................51
Management Engine Firmware Update ................................................................52
Management Engine Interaction...........................................................................52
5. BIOS Setup Utility.............................................................................................................53
5.1
5.2
5.3
5.3.1
5.3.2
Logo/Diagnostic Screen .......................................................................................53
BIOS Boot Popup Menu .......................................................................................53
BIOS Setup Utility ................................................................................................53
Operation .............................................................................................................54
Server Platform Setup Utility Screens ..................................................................56
6. Connector/Header Locations and Pin-outs ....................................................................91
6.1
Board Connector Information ...............................................................................91
Revision 1.9
Intel order number E44031-012
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