531AA748M000BG datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > oscillator> 531AA748M000BG

531AA748M000BG: DescriptionLVPECL Output Clock Oscillator, 748MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; Categoryoscillator; File Size268KB，15 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531AA748M000BG Overview

LVPECL Output Clock Oscillator, 748MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531AA748M000BG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
Is Samacsys	N
Other features	TRAY
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	50%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	748 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVPECL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.0 7/06

Si530/531

Recommended Resources

Wireless active subwoofer 02

LED fuse/indicator circuit diagram

voltage pulse width converter

Piezoelectric sensor detection circuit

LM317T application circuit

TA8211AH audio circuit

dsp serial port download program: I am currently using the serial port to download dsp28335 programs. I use the tool c2000progv1.3 to configure XA12, XA13, XA14, and XA15 to 0, 1, 1, 1 in order to put it in SCI-A mode. I use a multime...; donp Microcontroller MCU

EEWORLD University ---- Electrical Engineering: Electrical Engineering : https://training.eeworld.com.cn/course/4804Electric motors are the technical foundation course for electrical engineering and automation majors. Through studying various types...; JFET Industrial Control Electronics

[Atmel SAM R21 Creative Competition Weekly Plan] Week 5: First experience with USB function: R21 has a lot of USB routines. I ran a HID routineI ran a HID keyboard routineUpgrade, this update is really fast, it seems that there is always something to upgradeThis is before the board is inserte...; 770781327 Microchip MCU

Practical signal source: [i=s] This post was last edited by paulhyde on 2014-9-15 09:38 [/i] Useful signal sources Programs and hardware that can be made...; 369761094 Electronics Design Contest

Actual photos of Sate210/Sate4412 open source development board - a reference source for DIY S5pv210!: ——The new S5pv210 Gold Finger Core Board to be launched soon——2013.05.10 The PCB progress chart is as follows:——201307.29 Report on the latest Sate210 Gold Finger Core Board progress——2013.08.06 Attac...; gooogleman Embedded System

Ten things new women should do: Don’t follow these rules when looking for a wife: Can handle affairs of state, can handle cooking, can write code, can detect exceptions, can kill Trojans, can climb over walls, can afford a nice car, can afford a new house, can fight off mistresses,...; 花花 Talking

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components