ISL9000AIRJBZ datasheet, PDF - EEWORLD Datasheet

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ISL9000AIRJBZ: DescriptionDUAL OUTPUT, FIXED POSITIVE LDO REGULATOR, PDSO10; Categorysemiconductor Power management; File Size650KB，14 Pages; ManufacturerIntersil ( Renesas ); Websitehttp://www.intersil.com/cda/home/

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DUAL OUTPUT, FIXED POSITIVE LDO REGULATOR, PDSO10

ISL9000AIRJBZ Parametric

Parameter Name	Attribute value
Minimum input voltage	2.3 V
Maximum input voltage	6.5 V
Number of functions	1
Number of terminals	10
Processing package description	3 X 3 MM, ROHS COMPLIANT, PLASTIC, MO-229WEED-3, DFN-10
each_compli	Yes
EU RoHS regulations	Yes
state	Active
Adjustment type	FIXED POSITIVE MULTIPLE OUTPUT LDO REGULATOR
Adjustable	FIXED
dropout_voltage1_nom	0.2000 V
Maximum voltage difference 1	0.3250 V
Maximum voltage difference 2	0.3250 V
input_voltage_absolute_max	7.1 V
jesd_30_code	S-PDSO-N10
jesd_609_code	e3
moisture_sensitivity_level	1
Number of outputs	2
erating_temperature,_tj_mi	-40 Cel
erating_temperature,_tj_max	125 Cel
Maximum output current 1	0.3000 A
Maximum output current 2	0.3000 A
Rated output voltage 1	3.3 V
Minimum output voltage 1	3.24 V
Maximum output voltage 1	3.36 V
Rated output voltage 2	3.3 V
Maximum output voltage 2	3.24 V
Maximum output voltage 1	3.36 V
Packaging Materials	PLASTIC/EPOXY
ckage_code	HVSON
ckage_equivalence_code	SOLCC10,.11,20
packaging shape	SQUARE
Package Size	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
eak_reflow_temperature__cel_	260
qualification_status	COMMERCIAL
seated_height_max	1 mm
sub_category	Other Regulators
surface mount	YES
Craftsmanship	CMOS
terminal coating	MATTE TIN
Terminal form	NO LEAD
Terminal spacing	0.5000 mm
Terminal location	DUAL
ime_peak_reflow_temperature_max__s_	30
voltage_tolerance_max	1.8 %
length	3 mm
width	3 mm

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DATASHEET

ISL9000A

Dual LDO with Low Noise, Very High PSRR and Low IQ

ISL9000A is a high performance dual LDO capable of sourcing

300mA current from each output. It has a low standby current

and very high PSRR and is stable with output capacitance of

1µF to 10µF with ESR of up to 200m.

The device integrates an individual Power-On-Reset (POR)

function for each output. The POR delay for VO2 can be

externally programmed by connecting a timing capacitor to the

CPOR pin. The POR delay for VO1 is internally fixed at

approximately 2ms. A reference bypass pin is also provided for

connecting a noise filtering capacitor for low noise and high-

PSRR applications.

The quiescent current is typically only 42µA with both LDO’s

enabled and active. Separate enable pins control each

individual LDO output. When both enable pins are low, the

device is in shutdown, typically drawing less than 0.1µA.

Several combinations of voltage outputs are standard. Output

voltage options for each LDO range from 1.5V to 3.3V. Other

output voltage options may be available upon request.

FN6391

Rev 3.00

October 15, 2015

Features

• Integrates two 300mA high performance LDOs

• Excellent transient response to large current steps

• ±1.8% accuracy over all operating conditions

• Excellent load regulation: < 0.1% voltage change across full

range of load current

• Low output noise: typically 30µV

RMS

@ 100µA (1.5V)

• Very high PSRR: 90dB @ 1kHz

• Extremely low quiescent current: 42µA (both LDOs active)

• Wide input voltage capability: 2.3V to 6.5V

• Low dropout voltage: typically 200mV @ 300mA

• Stable with 1µF to 10µF ceramic capacitors

• Separate enable and POR pins for each LDO

• Soft-start and staged turn-on to limit input current surge

during enable

• Current limit and overheat protection

• Tiny 10 Ld 3mmx3mm DFN package

• -40°C to +85°C operating temperature range

• Pb-free (RoHS compliant)

Applications

• PDAs, Cell Phones and Smart Phones

• Portable Instruments, MP3 Players

• Handheld Devices including Medical Handheld

ISL9000A

VIN (2.3 TO 6.5V)

VIN

EN1

EN2

CBYP

CPOR

VO1

VO2

POR2

POR1

GND

VO2 OK

VO2 TOO LOW

OUT1

VO1 TOO LOW

VO1

VO2

RESET2

(200ms DELAY,

C3 = 0.01µF)

RESET1

(2ms DELAY)

ENABLE1

OFF ON

ENABLE2

OFF

C1, C4, C5: 1µF X5R CERAMIC CAPACITOR

C2: 0.1µF X7R CERAMIC CAPACITOR

C3: 0.01µF X7R CERAMIC CAPACITOR

FIGURE 1. TYPICAL APPLICATION

FN6391 Rev 3.00

October 15, 2015

Page 1 of 14

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