IS62WV25616ALL
IS62WV25616BLL
256K x 16 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC SRAM
FEATURES
• High-speed access time: 55ns, 70ns
• CMOS low power operation
36 mW (typical) operating
9 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply
1.65V--2.2V V
dd
(IS62WV25616ALL)
2.5V--3.6V V
dd
(IS62WV25616BLL)
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• Lead-free available
AUGUST 2014
speed, low power, 4M bit SRAMs organized as 256K words
by 16 bits. It is fabricated using
ISSI
's high-performance
CMOS technology. This highly reliable process coupled with
innovative circuit design techniques, yields high-performance
and low power consumption devices.
When
CS1 is HIGH (deselected) or when CS1
is
LOW
and
both
LB
and
UB are HIGH, the device assumes a standby
mode at which the power dissipation can be reduced down
with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable (WE)
controls both writing and reading of the memory. A data byte
allows Upper Byte (UB) and Lower Byte (LB) access.
The IS62WV25616ALL/IS62WV25616BLL are packaged
in the JEDEC standard 44-Pin TSOP (TYPE II)
and 48-pin
mini BGA (6mmx8mm).
DESCRIPTION
The
ISSI
IS62WV25616ALL/IS62WV25616BLL are high-
FUNCTIONAL BLOCK DIAGRAM
A0-A17
DECODER
256K x 16
MEMORY ARRAY
V
DD
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CS1
OE
WE
UB
LB
CONTROL
CIRCUIT
Copyright © 2014 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-
est version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. F
08/25/2014
1
IS62WV25616ALL, IS62WV25616BLL
PIN CONFIGURATIONS
48- ball mini BGA (6mm x 8mm)
(Package Code B)
1
2
3
4
5
6
44-Pin mini TSOP (Type II)
(Package Code T)
A
B
C
D
E
F
G
H
LB
I/O
8
I/O
9
GND
VDD
I/O
14
I/O
15
NC
OE
UB
I/O
10
I/O
11
I/O
12
I/O
13
NC
A8
A0
A3
A5
A17
NC
A14
A12
A9
A1
A4
A6
A7
A16
A15
A13
A10
A2
CSI
I/O
1
I/O
3
I/O
4
I/O
5
WE
A11
NC
I/O
0
I/O
2
VDD
GND
I/O
6
I/O
7
NC
A4
A3
A2
A1
A0
CS1
I/O0
I/O1
I/O2
I/O3
V
DD
GND
I/O4
I/O5
I/O6
I/O7
WE
A16
A15
A14
A13
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
V
DD
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
A17
44-Pin mini TSOP (Type II)
2 Chip Enable Option
(Package Code T2)
PIN DESCRIPTIONS
A0-A17
I/O0-I/O15
CS1,
CS2
OE
WE
LB
UB
NC
V
dd
GND
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Output Enable Input
Write Enable Input
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
No Connection
Power
Ground
A4
A3
A2
A1
A0
CS1
I/O0
I/O1
I/O2
I/O3
V
DD
GND
I/O4
I/O5
I/O6
I/O7
WE
A16
A15
A14
A13
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
V
DD
I/O11
I/O10
I/O9
I/O8
CS2
A8
A9
A10
A11
A17
2
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. F
08/25/2014
IS62WV25616ALL, IS62WV25616BLL
TRUTH TABLE
Mode
Not Selected
Output Disabled
Read
WE
X
X
H
H
H
H
h
L
L
l
CS1
H
X
L
L
L
L
l
L
L
l
OE
X
X
H
H
L
L
l
X
X
X
LB
X
H
L
X
L
H
l
L
H
l
UB
X
H
X
L
H
L
l
H
L
l
I/O PIN
I/O0-I/O7
I/O8-I/O15
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
d
out
High-Z
High-Z
d
out
d
out
d
out
d
In
High-Z
d
In
High-Z
d
In
d
In
V
dd
Current
I
sb
1
, I
sb
2
I
sb
1
, I
sb
2
I
cc
I
cc
I
cc
Write
I
cc
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
term
V
dd
t
stg
P
t
V
dd
Related to GND
Storage Temperature
Power Dissipation
Parameter
Terminal Voltage with Respect to GND
Value
–0.2 to V
dd
+0.3
–0.2 to V
dd
+0.3
–65 to +150
1.0
Unit
V
V
°C
W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This
is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the op-
erational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect reliability.
OPERATING RANGE (V
dd
)
Range
Commercial
Industrial
Ambient Temperature
0°C to +70°C
–40°C to +85°C
IS62WV25616ALL
1.65V - 2.2V
1.65V - 2.2V
IS62WV25616BLL
2.5V-3.6V
2.5V-3.6V
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol Parameter
V
oh
Output HIGH Voltage
V
ol
V
Ih
V
Il
(1)
I
lI
I
lo
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Output Leakage
Test Conditions
I
oh
=
-0.1 mA
I
oh
=
-1 mA
I
ol
=
0.1 mA
I
ol
=
2.1 mA
V
dd
1.65-2.2V
2.5-3.6V
1.65-2.2V
2.5-3.6V
1.65-2.2V
2.5-3.6V
1.65-2.2V
2.5-3.6V
GND ≤
V
In
≤
V
dd
GND ≤
V
out
≤
V
dd
,
Outputs Disabled
Min.
1.4
2.2
—
—
1.4
2.2
–0.2
–0.2
–1
–1
Max.
—
—
0.2
0.4
V
dd
+ 0.2
V
dd
+ 0.3
0.4
0.8
1
1
Unit
V
V
V
V
V
V
V
V
µA
µA
Notes:
1.
V
Il
(min.) = –1.0V
for pulse width less than 10 ns.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. F
08/25/2014
3