Ultra-Low-Power Linear Regulator with
Minimal Quiescent Current Technology
ZSPM4141
Datasheet
Brief Description
The ZSPM4141 is an ultra-low-power linear regu-
lator optimized for minimal quiescent current losses
via advanced, proprietary technology. It can improve
energy efficiency and reduce heat due to power
dissipation because it draws low nA-level quiescent
current for light loads, yet it can regulate current
loads as high as 200mA. The linear regulated output
voltage is factory-configured to an option from 1.2V
to 4.2V in 100mV steps. The ZSPM4141 also pro-
vides over-current protection.
Benefits
•
•
•
•
•
•
Ultra-low 100pA quiescent current in power down
mode
Best-in-class quiescent current of 20nA at I
LOAD
=0
0.5% DC line regulation (typical)
Extends battery life
Enables power harvesting applications
High level of integration minimizes board space
Related IDT Smart Power Products
•
Features
•
•
•
•
ZSPM4121 Under-Voltage Load Switch for
Smart Battery Management
Low operating voltage range: 2.5V to 5.5V
Power-Down Mode for 100pA quiescent current
Over-current protection: 250mA
Output voltage options of 1.2V to 4.2V in 100mV
steps (programmed at manufacturing)
Available Support
•
•
ZSPM4141W12KIT Evaluation Kit
Support Documentation
Physical Characteristics
•
Package: 8-pin DFN (2mm x2mm)
Typical ZSPM4141 Application Circuits
ZSPM4141 Basic (Fixed Output) Application
ZSPM4141AI1W12 Variable VOUT via Resistor Divider
V
CC
= 2.5V to 5.5V
VCC
VOUT
V
OUT
= 1.2V to 4.2V
V
CC
= 2.5V to 5.5V
VCC
VOUT
V
OUT
= 1.2V to 4.2V
C
BYP
ZSPM4141
EN
FB
C
OUT
2.2µF (typical)
C
BYP
ZSPM4141
EN
R1
C
OUT
2.2µF (typical)
FB
R2
GND
GND
© 2016 Integrated Device Technology, Inc.
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January 29, 2016
Ultra-Low-Power Linear Regulator with
Minimal Quiescent Current Technology
ZSPM4141
Datasheet
ZSPM4141 Block Diagram
VCC
Current
Limit
VOUT
Typical Applications
•
•
•
•
•
•
FB
EN
Reference
Voltage
Portable Electronics
Industrial
Medical
Smart Cards
RFID
Energy-Harvesting Systems
GND
ZSPM4141
Ordering Information
Ordering Code*
ZSPM4141AI1W12
ZSPM4141AI1W18
ZSPM4141AI1W25
ZSPM4141AI1W30
ZSPM4141AI1W31
ZSPM4141AI1W33
ZSPM4141AI1W42
Description
ZSPM4141 Ultra-Low Power Line Regulator —V
OUT
factory set to 1.2V
ZSPM4141 Ultra-Low Power Line Regulator —V
OUT
factory set to 1.8V
ZSPM4141 Ultra-Low Power Line Regulator —V
OUT
factory set to 2.5V
ZSPM4141 Ultra-Low Power Line Regulator —V
OUT
factory set to 3.0V
ZSPM4141 Ultra-Low Power Line Regulator —V
OUT
factory set to 3.1V
ZSPM4141 Ultra-Low Power Line Regulator —V
OUT
factory set to 3.3V
ZSPM4141 Ultra-Low Power Line Regulator —V
OUT
factory set to 4.2V
ZSPM4141 Evaluation Kit w/Vout adjusting resistors (default 1.2 Vout)
Package
8-pin DFN / Reel
8-pin DFN / Reel
8-pin DFN / Reel
8-pin DFN / Reel
8-pin DFN / Reel
8-pin DFN / Reel
8-pin DFN / Reel
ZSPM4141W12KIT
* W for 7” reel with 2500 parts. Custom V
OUT
values are also available: 1.2V to 4.2V (typical) in 100mV increments.
Corporate Headquarters
6024 Silver Creek Valley Road
San Jose, CA 95138
www.IDT.com
Sales
1-800-345-7015 or 408-284-8200
Fax: 408-284-2775
www.IDT.com/go/sales
Tech Support
www.IDT.com/go/support
DISCLAIMER Integrated Device Technology, Inc. (IDT) reserves the right to modify the products and/or specifications described herein at any time, without notice, at IDT's sole discretion. Performance
specifications and operating parameters of the described products are determined in an independent state and are not guaranteed to perform the same way when installed in customer products. The
information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT's products for any particular purpose, an
implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property
rights of IDT or any third parties.
IDT's products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be
reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT.
Integrated Device Technology, IDT and the IDT logo are trademarks or registered trademarks of IDT and its subsidiaries in the United States and other countries. Other trademarks used herein are the
property of IDT or their respective third party owners. For datasheet type definitions and a glossary of common terms, visit
www.idt.com/go/glossary.
All contents of this document are copyright of Integrated
Device Technology, Inc. All rights reserved.
© 2016 Integrated Device Technology, Inc.
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January 29, 2016
ZSPM4141 Datasheet
Contents
1
ZSPM4141 Characteristics.................................................................................................................................. 5
1.1. Absolute Maximum Ratings .......................................................................................................................... 5
1.2. Thermal Characteristics ................................................................................................................................ 5
1.3. Recommended Operating Conditions .......................................................................................................... 6
1.4. Electrical Characteristics .............................................................................................................................. 6
Typical Performance Characteristics .................................................................................................................. 7
Description of Circuit ........................................................................................................................................... 9
Application Circuits ............................................................................................................................................ 10
4.1. Selection of External Components ............................................................................................................. 10
4.1.1. Output Bypass Capacitor C
OUT
............................................................................................................ 10
4.1.2. Input Bypass Capacitor C
BYP
................................................................................................................ 10
4.1.3. Output Voltage Adjustment Resistors R1 and R2................................................................................ 10
4.2. Typical Application Circuit .......................................................................................................................... 11
Pin Configuration and Package ......................................................................................................................... 12
5.1. ZSPM4141 Package Dimensions and Marking Diagram ........................................................................... 12
5.2. Pin Assignments ......................................................................................................................................... 13
Layout and Soldering Requirements ................................................................................................................. 14
6.1. Recommended Landing Pattern for PCBs ................................................................................................. 14
6.2. Multi-Layer PCB Layout .............................................................................................................................. 15
6.3. Single-Layer PCB Layout ........................................................................................................................... 16
Ordering Information ......................................................................................................................................... 17
Related Documents ........................................................................................................................................... 17
Document Revision History ............................................................................................................................... 18
2
3
4
5
6
7
8
9
List of Figures
Figure 2.1
Figure 2.2
Figure 2.3
Figure 2.4
Figure 2.5
Figure 2.6
Figure 2.7
Figure 2.8
Figure 2.9
Figure 2.10
Figure 2.11
Figure 2.12
I
QQ
Performance vs. V
CC
........................................................................................................................ 7
I
QQ
Performance vs. Temperature ......................................................................................................... 7
I
QQ
Performance vs. Load Current ......................................................................................................... 7
I
QQ
Performance vs. Load Current in % ................................................................................................. 7
Line Regulation Performance ................................................................................................................ 7
V
OUT
Performance vs. Temperature....................................................................................................... 7
Dropout Voltage When V
OUT
Drops By 3% ............................................................................................ 8
Load Regulation Performance ............................................................................................................... 8
Load Step Response—I
OUT
= 0 to 30mA ............................................................................................... 8
Load Step Response—I
OUT
=30mA to 0 ................................................................................................ 8
Load Step Response—I
OUT
= 1mA to 30mA.......................................................................................... 8
Line Step Response .............................................................................................................................. 8
© 2016 Integrated Device Technology, Inc.
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ZSPM4141 Datasheet
Figure 2.13
Figure 3.1
Figure 4.1
Figure 4.2
Figure 5.1
Figure 5.2
Figure 6.1
Figure 6.2
Figure 6.3
Figure 6.4
Figure 6.5
Output Enable Timing ............................................................................................................................ 9
ZSPM4141 Block Diagram .................................................................................................................... 9
Basic ZSPM4141 Application Circuit—Fixed Output ........................................................................... 11
ZSPM4141AI1W12 Application Circuit—Variable Output ................................................................... 11
ZSPM4141 Package Drawing.............................................................................................................. 12
ZSPM4141 Pin Assignments (top view) .............................................................................................. 13
Recommended Landing Pattern for 8-Pin DFN ................................................................................... 14
Package and PCB Land Configuration for Multi-Layer PCB .............................................................. 15
JEDEC Standard FR4 Multi-Layer Board – Cross-Sectional View...................................................... 15
Conducting Heat Away from the Die using an Exposed Pad Package ............................................... 16
Application Using a Single-Layer PCB ................................................................................................ 16
List of Tables
Table 1.1
Table 1.2
Table 1.3
Table 1.4
Table 4.1
Table 5.1
Absolute Maximum Ratings ................................................................................................................... 5
Thermal Characteristics for 8-pin DFN (2x2) Package .......................................................................... 5
Recommended Operating Conditions ................................................................................................... 6
Electrical Characteristics ....................................................................................................................... 6
Output Voltage Adjustment Resistors and Resulting I
QQ
Increase ...................................................... 10
Pin Description, 8-Pin DFN (2mmx2mm) ............................................................................................ 13
© 2016 Integrated Device Technology, Inc.
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January 29, 2016
ZSPM4141 Datasheet
1
ZSPM4141 Characteristics
Important: Stresses beyond those listed under “Absolute Maximum Ratings” (section 1.1) may cause permanent
damage to the device. These are stress ratings only. Functional operation of the device at these or any other
conditions beyond those indicated under “Recommended Operating Conditions” (section 1.3) is not implied.
Exposure to absolute–maximum–rated conditions for extended periods could affect device reliability.
1.1.
Absolute Maximum Ratings
Over operating free–air temperature range unless otherwise noted. All voltage values are with respect to network
ground terminal.
Table 1.1
Absolute Maximum Ratings
Parameter
Maximum input/output on VCC, VOUT, EN, and FB pins
Electrostatic Discharge – Human Body Model, according to
the respective JESD22 JEDEC standard
Electrostatic Discharge – Charged Device Model, according
to the respective JESD22-C101 JEDEC standard
Operating Junction Temperature Range
Storage Temperature Range
Lead Temperature (soldering, 10 seconds)
T
J
T
stg
Symbol
Value
-0.3 to 6.0
2
Unit
V
kV
500
-20 to 85
-65 to 150
260
V
°C
°C
°C
1.2.
Thermal Characteristics
Thermal Characteristics for 8-pin DFN (2x2) Package
θ
JA
(°C/W)
73.1
1)
Table 1.2
θ
JC
(°C/W)
10.7
2)
1)
2)
This assumes a FR4 board only.
This assumes a 1oz. copper JEDEC standard board with thermal vias. See section 6.1 for more information.
© 2016 Integrated Device Technology, Inc.
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January 29, 2016