Not recommended for new designs. Please use SST39VF1601C
and SST39VF3201B.
16 Mbit / 32 Mbit / (x16) Multi-Purpose Flash Plus
A Microchip Technology Company
SST39VF1601 / SST39VF3201
SST39VF1602 / SST39VF3202
Not Recommended for New Designs
The SST39VF1601/1602 and SST39VF3201/3202 devices are 1M x16 and 2M
x16, respectively, CMOS Multi-Purpose Flash Plus (MPF+) manufactured with
SST's proprietary, high performance CMOS SuperFlash technology. The split-
gate cell design and thick-oxide tunneling injector attain better reliability and man-
ufacturability compared with alternate approaches. The SST39VF1601/1602/
3201/3202 write (Program or Erase) with a 2.7-3.6V power supply. These devices
conforms to JEDEC standard pinouts for x16 memories.
Features
• Organized as 1M x16: SST39VF1601/1602
2M x16: SST39VF3201/3202
• Single Voltage Read and Write Operations
– 2.7-3.6V
• Security-ID Feature
– SST: 128 bits; User: 128 bits
• Fast Read Access Time:
– 70 ns
• Superior Reliability
– Endurance: 100,000 Cycles (Typical)
– Greater than 100 years Data Retention
• Latched Address and Data
• Fast Erase and Word-Program:
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Chip-Erase Time: 40 ms (typical)
– Word-Program Time: 7 µs (typical)
• Low Power Consumption (typical values at 5 MHz)
– Active Current: 9 mA (typical)
– Standby Current: 3 µA (typical)
– Auto Low Power Mode: 3 µA (typical)
• Automatic Write Timing
– Internal V
PP
Generation
• Hardware Block-Protection/WP# Input Pin
– Top Block-Protection (top 32 KWord)
for SST39VF1602/3202
– Bottom Block-Protection (bottom 32 KWord)
for SST39VF1601/3201
• End-of-Write Detection
– Toggle Bits
– Data# Polling
• Sector-Erase Capability
– Uniform 2 KWord sectors
• CMOS I/O Compatibility
• JEDEC Standard
– Flash EEPROM Pinouts and command sets
• Block-Erase Capability
– Uniform 32 KWord blocks
• Packages Available
– 48-lead TSOP (12mm x 20mm)
– 48-ball TFBGA (6mm x 8mm)
• Chip-Erase Capability
• Erase-Suspend/Erase-Resume Capabilities
• Hardware Reset Pin (RST#)
• All devices are RoHS compliant
©2011 Silicon Storage Technology, Inc.
www.microchip.com
DS25028A
08/11
16 Mbit / 32 Mbit Multi-Purpose Flash Plus
A Microchip Technology Company
SST39VF1601 / SST39VF3201
SST39VF1602 / SST39VF3202
Not Recommended for New Designs
Product Description
The SST39VF160x and SST39VF320x devices are 1M x16 and 2M x16, respectively, CMOS Multi-
Purpose Flash Plus (MPF+) manufactured with SST’s proprietary, high performance CMOS Super-
Flash technology. The split-gate cell design and thick-oxide tunneling injector attain better reliability
and manufacturability compared with alternate approaches. The SST39VF160x/320x write (Program
or Erase) with a 2.7-3.6V power supply. These devices conform to JEDEC standard pinouts for x16
memories.
Featuring high performance Word-Program, the SST39VF160x/320x devices provide a typical Word-
Program time of 7 µsec. These devices use Toggle Bit or Data# Polling to indicate the completion of
Program operation. To protect against inadvertent write, they have on-chip hardware and Software
Data Protection schemes. Designed, manufactured, and tested for a wide spectrum of applications,
these devices are offered with a guaranteed typical endurance of 100,000 cycles. Data retention is
rated at greater than 100 years.
The SST39VF160x/320x devices are suited for applications that require convenient and economical
updating of program, configuration, or data memory. For all system applications, they significantly
improve performance and reliability, while lowering power consumption. They inherently use less
energy during Erase and Program than alternative flash technologies. The total energy consumed is a
function of the applied voltage, current, and time of application. Since for any given voltage range, the
SuperFlash technology uses less current to program and has a shorter erase time, the total energy
consumed during any Erase or Program operation is less than alternative flash technologies. These
devices also improve flexibility while lowering the cost for program, data, and configuration storage
applications.
The SuperFlash technology provides fixed Erase and Program times, independent of the number of
Erase/Program cycles that have occurred. Therefore the system software or hardware does not have
to be modified or de-rated as is necessary with alternative flash technologies, whose Erase and Pro-
gram times increase with accumulated Erase/Program cycles.
To meet high density, surface mount requirements, the SST39VF160x/320x are offered in 48-lead
TSOP and 48-ball TFBGA packages. See Figures 2 and 3 for pin assignments.
©2011 Silicon Storage Technology, Inc.
DS25028A
08/11
2
16 Mbit / 32 Mbit Multi-Purpose Flash Plus
A Microchip Technology Company
SST39VF1601 / SST39VF3201
SST39VF1602 / SST39VF3202
Not Recommended for New Designs
Block Diagram
X-Decoder
SuperFlash
Memory
Memory Address
Address Buffer Latches
Y-Decoder
CE#
OE#
WE#
WP#
RESET#
I/O Buffers and Data Latches
Control Logic
DQ
15
- DQ
0
1223 B1.0
Figure 1:
Functional Block Diagram
©2011 Silicon Storage Technology, Inc.
DS25028A
08/11
3
16 Mbit / 32 Mbit Multi-Purpose Flash Plus
A Microchip Technology Company
SST39VF1601 / SST39VF3201
SST39VF1602 / SST39VF3202
Not Recommended for New Designs
Pin Assignment
SST39VF3201/3202
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
WE#
RST#
NC
WP#
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
SST39VF1601/1602
A15
A14
A13
A12
A11
A10
A9
A8
A19
NC
WE#
RST#
NC
WP#
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
SST39VF160x/320x
A16
NC
VSS
DQ15
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VDD
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
VSS
CE#
A0
1223 48-tsop P01.4
Standard Pinout
Top View
Die Up
Figure 2:
Pin Assignments for 48-lead TSOP
TOP VIEW (balls facing down)
TOP VIEW (balls facing down)
SST39VF1601/1602
SST39VF3201/3202
6
5
4
3
2
1
A13 A12 A14
A9
A8
A10
NC
A15 A16 NC DQ15 VSS
A11 DQ7 DQ14 DQ13 DQ6
A19 DQ5 DQ12 VDD DQ4
NC
DQ2 DQ10 DQ11 DQ3
A5
A1
DQ0 DQ8 DQ9 DQ1
A0 CE# OE# VSS
6
5
4
3
2
1
A13 A12 A14
A9
A8
A10
NC
A15 A16 NC DQ15 VSS
A11 DQ7 DQ14 DQ13 DQ6
A19 DQ5 DQ12 VDD DQ4
WE# RST#
WE# RST#
NC WP# A18
A7
A3
A17
A4
A6
A2
NC WP# A18
A20
DQ2 DQ10 DQ11 DQ3
A7
A3
A17
A4
A6
A2
A5
A1
DQ0 DQ8 DQ9 DQ1
A0 CE# OE# VSS
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
1223 48-tfbga B3K P02.0
1223 48-tfbga B3K P02a.2
Figure 3:
pin assignments for 48-ball TFBGA
©2011 Silicon Storage Technology, Inc.
DS25028A
08/11
4
16 Mbit / 32 Mbit Multi-Purpose Flash Plus
A Microchip Technology Company
SST39VF1601 / SST39VF3201
SST39VF1602 / SST39VF3202
Not Recommended for New Designs
Table 1:
Pin Description
Symbol
A
MS1
-A
0
Pin Name
Address Inputs
Functions
To provide memory addresses.
During Sector-Erase A
MS
-A
11
address lines will select the sector.
During Block-Erase A
MS
-A
15
address lines will select the block.
DQ
15
-DQ
0
Data Input/output To output data during Read cycles and receive input data during Write cycles.
Data is internally latched during a Write cycle.
The outputs are in tri-state when OE# or CE# is high.
WP#
RST#
CE#
OE#
WE#
V
DD
V
SS
NC
Write Protect
Reset
Chip Enable
Output Enable
Write Enable
Power Supply
Ground
No Connection
Unconnected pins.
T1.2 25028
To protect the top/bottom boot block from Erase/Program operation when
grounded.
To reset and return the device to Read mode.
To activate the device when CE# is low.
To gate the data output buffers.
To control the Write operations.
To provide power supply voltage: 2.7-3.6V
1. A
MS
= Most significant address
A
MS
= A
19
for SST39VF1601/1602, and A
20
for SST39VF3201/3202
©2011 Silicon Storage Technology, Inc.
DS25028A
08/11
5
京公网安备 11010802033920号
EEWORLD
