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84330CYLNT

Description
Clock Synthesizer / Jitter Cleaner 1 LVPECL OUT SYNTHESIZER
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size274KB,20 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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84330CYLNT Overview

Clock Synthesizer / Jitter Cleaner 1 LVPECL OUT SYNTHESIZER

84330CYLNT Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeTQFP
package instructionLQFP-32
Contacts32
Manufacturer packaging codePRG32
Reach Compliance Codecompliant
ECCN codeEAR99
Is SamacsysN
JESD-30 codeS-PQFP-G32
JESD-609 codee3
length7 mm
Humidity sensitivity level3
Number of terminals32
Maximum operating temperature70 °C
Minimum operating temperature
Maximum output clock frequency700 MHz
Package body materialPLASTIC/EPOXY
encapsulated codeLQFP
Encapsulate equivalent codeQFP32,.35SQ,32
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Master clock/crystal nominal frequency25 MHz
Certification statusNot Qualified
Maximum seat height1.6 mm
Maximum slew rate160 mA
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width7 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER
Base Number Matches1
700MHz, Low Jitter, Crystal-to-3.3V
Differential LVPECL Frequency
84330C
DATA SHEET
General Description
The 84330C is a general purpose, single output high frequency
synthesizer. The VCO operates at a frequency range of 250MHz to
700MHz. The VCO and output frequency can be programmed using
the serial or parallel interfaces to the configuration logic. The output
can be configured to divide the VCO frequency by 1, 2, 4, and 8.
Output frequency steps as small as 250kHz to 2MHz can be achieved
using a 16MHz crystal depending on the output divider settings.
Features
Fully integrated PLL, no external loop filter requirements
One differential 3.3V LVPECL output
Crystal oscillator interface: 10MHz to 25MHz
Output frequency range: 31.25MHz to 700MHz
VCO range: 250MHz to 700MHz
Parallel or serial interface for programming M and N dividers during
power-up
RMS period jitter: 5ps (maximum)
Cycle-to-cycle jitter: 40ps (maximum)
3.3V supply voltage
0°C to 70°C ambient operating temperature
Available in lead-free (RoHS 6) package
Pin Assignments
V
CC
nFOUT
25 24 23 22 21 20 19
S_CLOCK
S_DATA
S_LOAD
V
CCA
FREF_EXT
XTAL_SEL
26
27
18
17
N1
N0
M8
M7
M6
M5
M4
ICS84330C
16
28
28 Lead PLCC
V Package
15
1
11.6mm x 11.4mm x 4.1mm
14
2
package body
Top View
13
3
4
5
XTAL2
FOUT
TEST
V
CC
V
EE
V
EE
Block Diagram
OE
XTAL1
OSC
XTAL2
FREF_EXT
Pulldown
Pullup
XTAL1
12
6
OE
7
nP_LOAD
8
M0
9
M1
10 11
M2
V
CC
TEST
M3
V
EE
1
FOUT
0
V
CC
nFOUT
÷ 16
XTAL_SEL
Pullup
32 31 30 29 28 27 26 25
PLL
PHASE DETECTOR
1
VCO
÷M
÷2
0
÷2
÷4
÷8
÷1
S_CLOCK
S_DATA
S_LOAD
FOUT
nFOUT
V
CCA
V
CCA
FREF_EXT
1
2
3
4
5
6
7
8
9
XTAL2
V
CC
V
EE
24
nc
N1
N0
M8
M7
M6
M5
M4
84330C
32 Lead LQFP
Y Package
7mm x 7mm x 1.4mm
package body
Top View
23
22
21
20
19
18
17
M2
OE
nP_LOAD
M0
M0:M8
N0:N1
Pullup
Pullup
84330C Rev D 4/22/15
1
©2015 Integrated Device Technology, Inc.
M1
M3
nc
S_LOAD
S_DATA
S_CLOCK
nP_LOAD
Pulldown
Pulldown
Pulldown
Pullup
XTAL_SEL
CONFIGURATION
INTERFACE
LOGIC
TEST
XTAL1
10 11 12 13 14 15 16

84330CYLNT Related Products

84330CYLNT 84330CYLN
Description Clock Synthesizer / Jitter Cleaner 1 LVPECL OUT SYNTHESIZER Clock Synthesizer / Jitter Cleaner 1 LVPECL OUT SYNTHESIZER
Brand Name Integrated Device Technology Integrated Device Technology
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code TQFP TQFP
package instruction LQFP-32 LQFP-32
Contacts 32 32
Manufacturer packaging code PRG32 PRG32
Reach Compliance Code compliant compliant
ECCN code EAR99 EAR99
Is Samacsys N N
JESD-30 code S-PQFP-G32 S-PQFP-G32
JESD-609 code e3 e3
length 7 mm 7 mm
Humidity sensitivity level 3 3
Number of terminals 32 32
Maximum operating temperature 70 °C 70 °C
Maximum output clock frequency 700 MHz 700 MHz
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LQFP LQFP
Encapsulate equivalent code QFP32,.35SQ,32 QFP32,.35SQ,32
Package shape SQUARE SQUARE
Package form FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius) 260 260
power supply 3.3 V 3.3 V
Master clock/crystal nominal frequency 25 MHz 25 MHz
Certification status Not Qualified Not Qualified
Maximum seat height 1.6 mm 1.6 mm
Maximum slew rate 160 mA 160 mA
Maximum supply voltage 3.465 V 3.465 V
Minimum supply voltage 3.135 V 3.135 V
Nominal supply voltage 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
Terminal form GULL WING GULL WING
Terminal pitch 0.8 mm 0.8 mm
Terminal location QUAD QUAD
Maximum time at peak reflow temperature 30 30
width 7 mm 7 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
Base Number Matches 1 1
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