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841S101EGILFT

Description
Clock Synthesizer / Jitter Cleaner MULTIRATE FEMTOCLOCK LVPE
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size437KB,24 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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841S101EGILFT Overview

Clock Synthesizer / Jitter Cleaner MULTIRATE FEMTOCLOCK LVPE

841S101EGILFT Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP16,.25
Contacts16
Manufacturer packaging codePGG16
Reach Compliance Codecompliant
ECCN codeEAR99
JESD-30 codeR-PDSO-G16
JESD-609 codee3
length5 mm
Humidity sensitivity level1
Number of terminals16
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Maximum output clock frequency100 MHz
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Master clock/crystal nominal frequency25 MHz
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum slew rate80 mA
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width4.4 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER
Base Number Matches1
Crystal-to-HCSL, 100MHz PCI Express
Clock Synthesizer
841S101
Datasheet
General Description
The 841S101 is a PLL-based clock synthesizer specifically designed
for PCI_Express™ Clock applications. This device generates a
100MHz differential HCSL clock from a input reference of 25MHz.
The input reference may be derived from an external source or by the
addition of a 25MHz crystal to the on-chip crystal oscillator. An
external reference is applied to the XTAL_IN pin with the XTAL_OUT
pin left floating.The device offers spread spectrum clock output for
reduced EMI applications. An I
2
C bus interface is used to enable or
disable spread spectrum operation as well as select either a down
spread value of -0.35% or -.5%.The 841S101 is available in a
lead-free 16-Lead TSSOP package.
Features
One 0.7V current mode differential HCSL output pair
Crystal oscillator interface: 25MHz
Output frequency: 100MHz
RMS phase jitter @ 100MHz (12kHz – 20MHz): 1.23ps (typical)
Cycle-to-cycle jitter: 20ps (maximum)
I
2
C support with readback capabilities up to 400kHz
Spread Spectrum for electromagnetic interference (EMI) reduction
3.3V operating supply mode
-40°C to 85°C ambient operating temperature
Available in a lead-free (RoHS 6) package
PCI Express Gen 1, 2 and 3 jitter compliant
HiPerClockS™
Block Diagram
XTAL_IN
XTAL_OUT
SDATA
SCLK
IREF
Pullup
Pullup
25MHz
Pin Assignment
V
SS
OSC
PLL
Divider
Network
SRCT0
SRCC0
V
DD
1
2
3
4
5
6
7
8
I
2
C
Logic
SRCT0
SRCC0
V
D D
V
SS
IREF
V
SS
16
15
14
13
12
11
10
9
V
D D
SDATA
SCLK
XTAL_ OUT
XTAL_IN
V
D D
V
SS
V
D DA
841S101
16-Lead TSSOP
4.4mm x 5.0mm x 0.925mm package body
G Package
Top View
©2016 Integrated Device Technology, Inc.
1
Revision B, May 25, 2016

841S101EGILFT Related Products

841S101EGILFT
Description Clock Synthesizer / Jitter Cleaner MULTIRATE FEMTOCLOCK LVPE
Brand Name Integrated Device Technology
Is it lead-free? Lead free
Is it Rohs certified? conform to
Parts packaging code TSSOP
package instruction TSSOP, TSSOP16,.25
Contacts 16
Manufacturer packaging code PGG16
Reach Compliance Code compliant
ECCN code EAR99
JESD-30 code R-PDSO-G16
JESD-609 code e3
length 5 mm
Humidity sensitivity level 1
Number of terminals 16
Maximum operating temperature 85 °C
Minimum operating temperature -40 °C
Maximum output clock frequency 100 MHz
Package body material PLASTIC/EPOXY
encapsulated code TSSOP
Encapsulate equivalent code TSSOP16,.25
Package shape RECTANGULAR
Package form SMALL OUTLINE
Peak Reflow Temperature (Celsius) 260
power supply 3.3 V
Master clock/crystal nominal frequency 25 MHz
Certification status Not Qualified
Maximum seat height 1.2 mm
Maximum slew rate 80 mA
Maximum supply voltage 3.465 V
Minimum supply voltage 3.135 V
Nominal supply voltage 3.3 V
surface mount YES
technology CMOS
Temperature level INDUSTRIAL
Terminal surface Matte Tin (Sn) - annealed
Terminal form GULL WING
Terminal pitch 0.65 mm
Terminal location DUAL
Maximum time at peak reflow temperature 30
width 4.4 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, OTHER
Base Number Matches 1
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