L6563
L6563A
Advanced transition-mode PFC controller
Features
■
■
■
■
■
■
■
■
■
■
■
■
Very precise adjustable output overvoltage
protection
Tracking boost function
Protection against feedback loop failure
(Latched shutdown)
Interface for cascaded converter's PWM
controller
Input voltage feedforward (1/V
2
)
Inductor saturation detection (L6563 only)
Remote ON/OFF control
Low (≤ 90µA) start-up current
5mA max. quiescent current
1.5% (@ T
J
= 25°C) internal reference voltage
-600/+800 mA totem pole gate driver with
active pull-down during UVLO
SO14 package
Block diagram
INV
1
TRACKING
BOOST
SO-14
Applications
PFC pre-regulators for:
■
■
■
HI-END AC-DC adapter/charger
Desktop PC, server, WEB server
IEC61000-3-2 OR JEIDA-MITI compliant
SMPS, in excess of 350W
Table 1. Device summary
Part number
L6563
L6563TR
L6563A
L6563ATR
Package
SO-14
SO-14
SO-14
SO-14
Packaging
Tube
Tape & Reel
Tube
Tape & Reel
Figure 1.
COMP
2
MULT
3
Ideal diode
VFF
5
1/V
2
TBO
6
1:1
CURRENT
MIRROR
1:1
BUFFER
-
2.5V
+
Voltage
references
Vbias
(INTERNAL SUPPLY BUS)
MULTIPLIER
LINE VOLTAGE
FEEDFORWARD
3V
from
VFF
VOLTAGE
REGULATOR
1.7V
-
+
-
INDUCTOR
SATURATION
DETECTION
( not in L6563A )
LEADING-EDGE
BLANKING
4
CS
+
Q
V
CC
SAT
V
CC
14
R
R1
UVLO
COMPARATOR
+
R2
V
REF2
-
UVLO
S
Q
15 V
13
GD
Driver
GND
12
11
ZCD
10
RUN
1.4V
0.7V
-
-
ZERO CURRENT
DETECTOR
Starter
OFF
STARTER
+
0.2V
0.26V
PFC_OK
7
DISABLE
0.52V
0.6V
ON/OFF CONTROL
(BROWNOUT DETECTION)
+
LATCH
SAT
9
PWM_STOP
8
PWM_LATCH
March 2007
Rev 4
-
Vbias
FEEDBACK
FAILURE
PROTECTION
-
+
+
2.5V
1/39
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39
Contents
L6563 - L6563A
Contents
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
1.2
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
3
4
5
6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Typical electrical performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
Overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Feedback Failure Protection (FFP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Voltage Feedforward . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
THD optimizer circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Tracking Boost function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Inductor saturation detection (L6563 only) . . . . . . . . . . . . . . . . . . . . . . . . 27
Power management/housekeeping functions . . . . . . . . . . . . . . . . . . . . . . 28
Summary of L6563/A idle states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
7
8
9
Application examples and ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
2/39
L6563 - L6563A
Description
1
Description
The device is a current-mode PFC controller operating in Transition Mode (TM). Based on
the core of a standard TM PFC controller, it offers improved performance and additional
functions.
The highly linear multiplier, along with a special correction circuit that reduces crossover
distortion of the mains current, allows wide-range-mains operation with an extremely low
THD even over a large load range.
The output voltage is controlled by means of a voltage-mode error amplifier and a precise
(1.5% @T
J
= 25°C) internal voltage reference. The stability of the loop and the transient
response to sudden mains voltage changes are improved by the voltage feedforward
function (1/V
2
correction).
Additionally, the IC provides the option for tracking boost operation (where the output
voltage is changed tracking the mains voltage). The device features extremely low
consumption (≤ 90 µA before start-up and
≤
5 mA running).
In addition to an effective two-step OVP that handles normal operation overvoltages, the IC
provides also a protection against feedback loop failures or erroneous output voltage
setting.
In the L6563 a protection is added to stop the PFC stage in case the boost inductor
saturates. This function is not included in the L6563A. This is the only difference between
the two part numbers.
An interface with the PWM controller of the DC-DC converter supplied by the PFC pre-
regulator is provided: the purpose is to stop the operation of the converter in case of
anomalous conditions for the PFC stage (feedback loop failure, boost inductor's core
saturation) in the L6563 only and to disable the PFC stage in case of light load for the DC-
DC converter, so as to make it easier to comply with energy saving norms (Blue Angel,
EnergyStar, Energy2000, etc.). The device includes disable functions suitable for remote
ON/OFF control both in systems where the PFC pre-regulator works as a master and in
those where it works as a slave.
The totem-pole output stage, capable of 600 mA source and 800 mA sink current, is suitable
to drive high current MOSFETs or IGBTs. This, combined with the other features and the
possibility to operate with the proprietary Fixed-Off-Time control, makes the device an
excellent low-cost solution for EN61000-3-2 compliant SMPS in excess of 350W.
Figure 2.
Typical system block diagram
PFC PRE-REGULATOR
DC-DC CONVERTER
V
inac
V
outdc
PWM is turned off in case of PFC’s
anomalous operation for safety
L6563
L6563A
PWM or
Resonant
CONTROLLER
PFC can be turned off at light
load to ease compliance with
energy saving regulations.
3/39
Description
L6563 - L6563A
1.1
Pin connection
Figure 3.
Pin connection
(top view)
INV
COMP
MULT
CS
VFF
TBO
PFC_OK
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Vcc
GD
GND
ZCD
RUN
PWM_STOP
PWM_LATCH
1.2
Pin description
Table 2. Pin description
Pin N°
Name
Description
Inverting input of the error amplifier. The information on the output voltage of the PFC pre-
regulator is fed into the pin through a resistor divider.
The pin normally features high impedance but, if the tracking boost function is used, an
internal current generator programmed by TBO (pin 6) is activated. It sinks current from the
pin to change the output voltage so that it tracks the mains voltage.
Output of the error amplifier. A compensation network is placed between this pin and INV
(pin 1) to achieve stability of the voltage control loop and ensure high power factor and low
THD.
Main input to the multiplier. This pin is connected to the rectified mains voltage via a
resistor divider and provides the sinusoidal reference to the current loop. The voltage on
this pin is used also to derive the information on the RMS mains voltage.
Input to the PWM comparator. The current flowing in the MOSFET is sensed through a
resistor, the resulting voltage is applied to this pin and compared with an internal reference
to determine MOSFET’s turn-off.
A second comparison level at 1.7V detects abnormal currents (e.g. due to boost inductor
saturation) and, on this occurrence, shuts down the IC, reduces its consumption almost to
the start-up level and asserts PWM_LATCH (pin 8) high. This function is not present in the
L6563A.
Second input to the multiplier for 1/V
2
function. A capacitor and a parallel resistor must be
connected from the pin to GND. They complete the internal peak-holding circuit that
derives the information on the RMS mains voltage. The voltage at this pin, a DC level equal
to the peak voltage at pin MULT (pin 3), compensates the control loop gain dependence on
the mains voltage. Never connect the pin directly to GND.
1
INV
2
COMP
3
MULT
4
CS
5
VFF
4/39
L6563 - L6563A
Table 2. Pin description
(continued)
Pin N°
Name
Description
Description
6
TBO
Tracking Boost function. This pin provides a buffered VFF voltage. A resistor connected
between this pin and GND defines a current that is sunk from pin INV (pin 1). In this way,
the output voltage is changed proportionally to the mains voltage (tracking boost). If this
function is not used leave this pin open.
PFC pre-regulator output voltage monitoring/disable function. This pin senses the output
voltage of the PFC pre-regulator through a resistor divider and is used for protection
purposes. If the voltage at the pin exceeds 2.5V the IC is shut down, its consumption goes
almost to the start-up level and this condition is latched. PWM_LATCH pin is asserted high.
Normal operation can be resumed only by cycling the Vcc. This function is used for
protection in case the feedback loop fails.
If the voltage on this pin is brought below 0.2V the IC is shut down and its consumption is
considerably reduced. To restart the IC the voltage on the pin must go above 0.26V. If these
functions are not needed, tie the pin to a voltage between 0.26 and 2.5 V.
7
PFC_OK
8
Output pin for fault signaling. During normal operation this pin features high impedance. If
either a voltage above 2.5V at PFC_OK (pin 7) or a voltage above 1.7V on CS (pin 4) of
PWM_LATCH L6563 is detected the pin is asserted high. Normally, this pin is used to stop the operation
of the DC-DC converter supplied by the PFC pre-regulator by invoking a latched disable of
its PWM controller. If not used, the pin will be left floating.
Output pin for fault signaling. During normal operation this pin features high impedance. If
the IC is disabled by a voltage below 0.5V on RUN (pin 10) the voltage at the pin is pulled
PWM_STOP to ground. Normally, this pin is used to temporarily stop the operation of the DC-DC
converter supplied by the PFC pre-regulator by disabling its PWM controller. If not used,
the pin will be left floating.
Remote ON/OFF control. A voltage below 0.52V shuts down (not latched) the IC and
brings its consumption to a considerably lower level. PWM_STOP is asserted low. The IC
restarts as the voltage at the pin goes above 0.6V. Connect this pin to VFF (pin 5) either
directly or through a resistor divider to use this function as brownout (AC mains
undervoltage) protection, tie to INV (pin 1) if the function is not used.
Boost inductor’s demagnetization sensing input for transition-mode operation. A negative-
going edge triggers MOSFET’s turn-on.
Ground. Current return for both the signal part of the IC and the gate driver.
Gate driver output. The totem pole output stage is able to drive power MOSFET’s and
IGBT’s with a peak current of 600 mA source and 800 mA sink. The high-level voltage of
this pin is clamped at about 12V to avoid excessive gate voltages.
Supply Voltage of both the signal part of the IC and the gate driver.
9
10
RUN
11
12
13
14
ZCD
GND
GD
VCC
5/39
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