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IDT70T9159L7BF1

Description
HIGH-SPEED 2.5V 16/8K X 9 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM
File Size188KB,16 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
Download Datasheet View All

IDT70T9159L7BF1 Overview

HIGH-SPEED 2.5V 16/8K X 9 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM

HIGH-SPEED 2.5V
16/8K X 9 SYNCHRONOUS
PIPELINED
DUAL-PORT STATIC RAM
.eatures
x
x
PRELIMINARY
IDT70T9169/59L
x
x
x
x
True Dual-Ported memory cells which allow simultaneous
access of the same memory location
High-speed clock to data access
– Commercial:7.5/9/12ns (max.)
– Industrial: 9ns (max.)
Low-power operation
– IDT70T9169/59L
Active: 225mW (typ.)
Standby: 1.5mW (typ.)
Flow-Through or Pipelined output mode on either Port via
the
FT/PIPE
pins
Counter enable and reset features
Dual chip enables allow for depth expansion without
additional logic
x
x
x
x
Full synchronous operation on both ports
– 4.0ns setup to clock and 0.5ns hold on all control, data, and
address inputs
– Data input, address, and control registers
– Fast 7.5ns clock to data out in the Pipelined output mode
– Self-timed write allows fast cycle time
– 12ns cycle time, 83MHz operation in Pipelined output mode
LVTTL- compatible, single 2.5V (±100mV) power supply
Industrial temperature range (–40°C to +85°C) is
available for 66MHz
Available in a 100-pin Thin Quad Flatpack (TQFP) and 100-
pin fine pitch Ball Grid Array (fpBGA) packages.
.unctional Block Diagram
R/W
L
OE
L
CE
0L
CE
1L
R/W
R
OE
R
CE
0R
CE
1R
1
0
0/1
1
0
0/1
FT/PIPE
L
0/1
1
0
0
1
0/1
FT/PIPE
R
I/O
0L
- I/O
8L
I/O
0R
- I/O
8R
I/O
Control
I/O
Control
A
13L
(1)
A
0L
CLK
L
ADS
L
CNTEN
L
CNTRST
L
Counter/
Address
Reg.
MEMORY
ARRAY
Counter/
Address
Reg.
A
13R
(1)
A
0R
CLK
R
ADS
R
CNTEN
R
CNTRST
R
5654 drw 01
NOTE:
1. A
13
is a NC for IDT70T9159.
JULY 2002
1
©2002 Integrated Device Technology, Inc.
DSC-5654/1
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