HY29F800ATR-90 datasheet, PDF - EEWORLD Datasheet

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HY29F800ATR-90: Description8 Megabit (1Mx8/512Kx16), 5 Volt-only, Flash Memory; Categorystorage storage; File Size204KB，40 Pages; ManufacturerSK Hynix; Websitehttp://www.hynix.com/eng/

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HY29F800ATR-90 Overview

8 Megabit (1Mx8/512Kx16), 5 Volt-only, Flash Memory

HY29F800ATR-90 Parametric

Parameter Name	Attribute value
Maker	SK Hynix
Parts packaging code	TSOP
package instruction	TSOP1-R, TSSOP48,.8,20
Contacts	48
Reach Compliance Code	compli
ECCN code	EAR99
Maximum access time	90 ns
Spare memory width	8
startup block	TOP
command user interface	YES
Data polling	YES
Durability	100000 Write/Erase Cycles
JESD-30 code	R-PDSO-G48
JESD-609 code	e6
length	18.4 mm
memory density	8388608 bi
Memory IC Type	FLASH
memory width	16
Number of functions	1
Number of departments/size	1,2,1,15
Number of terminals	48
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	512KX16
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP1-R
Encapsulate equivalent code	TSSOP48,.8,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Parallel/Serial	PARALLEL
power supply	5 V
Programming voltage	5 V
Certification status	Not Qualified
ready/busy	YES
reverse pinout	YES
Maximum seat height	1.2 mm
Department size	16K,8K,32K,64K
Maximum standby current	0.000005 A
Maximum slew rate	0.06 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN BISMUTH
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
switch bit	YES
type	NOR TYPE
width	12 mm

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HY29F800A

8 Megabit (1Mx8/512Kx16), 5 Volt-only, Flash Memory

KEY FEATURES

5 Volt Read, Program, and Erase

– Minimizes system-level power requirements

High Performance

– Access times as fast as 50 ns

Low Power Consumption

– 20 mA typical active read current in byte

mode, 28 mA typical in word mode

– 35 mA typical program/erase current

– 5 µA maximum CMOS standby current

Compatible with JEDEC Standards

– Package, pinout and command-set

compatible with the single-supply Flash

device standard

– Provides superior inadvertent write

protection

Sector Erase Architecture

– Boot sector architecture with top and

bottom boot block options available

– One 16 Kbyte, two 8 Kbyte, one 32 Kbyte

and fifteen 64 Kbyte sectors in byte mode

– One 8 Kword, two 4 Kword, one 16 Kword

and fifteen 32 Kword sectors in word mode

– A command can erase any combination of

sectors

– Supports full chip erase

Erase Suspend/Resume

– Temporarily suspends a sector erase

operation to allow data to be read from, or

programmed into, any sector not being

erased

GENERAL DESCRIPTION

The HY29F800A is an 8 Megabit, 5 volt only CMOS

Flash memory organized as 1,048,576 (1M) bytes

or 524,288 (512K) words. The device is offered in

industry-standard 44-pin PSOP and 48-pin TSOP

packages.

The HY29F800A can be programmed and erased

in-system with a single 5-volt V

supply. Internally

generated and regulated voltages are provided for

program and erase operations, so that the device

does not require a high voltage power supply to

perform those functions. The device can also be

programmed in standard EPROM programmers.

Access times as fast as 55 ns over the full operat-

ing voltage range of 5.0 volts ± 10% are offered for

timing compatibility with the zero wait state require-

ments of high speed microprocessors. A 50 ns

Preliminary

Revision 1.1, February 2002

Sector Protection

– Any combination of sectors may be locked

to prevent program or erase operations

within those sectors

Temporary Sector Unprotect

– Allows changes in locked sectors

(requires high voltage on RESET# pin)

Internal Erase Algorithm

– Automatically erases a sector, any

combination of sectors, or the entire chip

Internal Programming Algorithm

– Automatically programs and verifies data

at a specified address

Fast Program and Erase Times

– Byte programming time: 7 µs typical

– Sector erase time: 1.0 sec typical

– Chip erase time: 19 sec typical

Data# Polling and Toggle Status Bits

– Provide software confirmation of

completion of program or erase

operations

Ready/Busy# Output (RY/BY#)

– Provides hardware confirmation of

completion of program and erase

operations

Minimum 100,000 Program/Erase Cycles

Space Efficient Packaging

– Available in industry-standard 44-pin

PSOP and 48-pin TSOP and reverse

TSOP packages

LOGIC DIAGRAM

A[18:0]

DQ[7:0]

CE#

OE#

WE#

RESET#

BYTE#

RY/BY#

DQ[14:8]

DQ[15]/A-1

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