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HY29F400ATG-55

Description
4 Megabit (512Kx8/256Kx16) 5 Volt-only Flash Memory
Categorystorage    storage   
File Size532KB,40 Pages
ManufacturerSK Hynix
Websitehttp://www.hynix.com/eng/
Download Datasheet Parametric View All

HY29F400ATG-55 Overview

4 Megabit (512Kx8/256Kx16) 5 Volt-only Flash Memory

HY29F400ATG-55 Parametric

Parameter NameAttribute value
MakerSK Hynix
Parts packaging codeSOIC
package instructionPLASTIC, SOP-44
Contacts44
Reach Compliance Codecompli
ECCN codeEAR99
Maximum access time55 ns
Spare memory width8
startup blockTOP
command user interfaceYES
Data pollingYES
Durability100000 Write/Erase Cycles
JESD-30 codeR-PDSO-G44
length28.2 mm
memory density4194304 bi
Memory IC TypeFLASH
memory width16
Number of functions1
Number of departments/size1,2,1,7
Number of terminals44
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize256KX16
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP44,.63
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
power supply5 V
Programming voltage5 V
Certification statusNot Qualified
ready/busyYES
Maximum seat height2.8 mm
Department size16K,8K,32K,64K
Maximum standby current0.001 A
Maximum slew rate0.06 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
switch bitYES
typeNOR TYPE
width13.3 mm
HY29F400A
4 Megabit (512Kx8/256Kx16) 5 Volt-only Flash Memory
KEY FEATURES
5 Volt Read, Program, and Erase
– Minimizes system-level power requirements
High Performance
– Access times as fast as 50 ns
Low Power Consumption
– 20 mA typical active read current in byte
mode, 28 mA typical in word mode
– 30 mA typical program/erase current
– 5 µA maximum CMOS standby current
Compatible with JEDEC Standards
– Package, pinout and command-set
compatible with the single-supply Flash
device standard
– Provides superior inadvertent write
protection
Sector Erase Architecture
– Boot sector architecture with top and
bottom boot block options available
– One 16 Kbyte, two 8 Kbyte, one 32 Kbyte
and seven 64 Kbyte sectors in byte mode
– One 8 Kword, two 4 Kword, one 16 Kword
and seven 32 Kword sectors in word mode
– A command can erase any combination of
sectors
– Supports full chip erase
Erase Suspend/Resume
– Temporarily suspends a sector erase
operation to allow data to be read from, or
programmed into, any sector not being
erased
GENERAL DESCRIPTION
The HY29F400A is a 4 Megabit, 5 volt only CMOS
Flash memory organized as 524,288 (512K) bytes
or 262,144 (256K) words. The device is offered in
industry-standard 44-pin PSOP and 48-pin TSOP
packages.
The HY29F400A can be programmed and erased
in-system with a single 5-volt V
CC
supply. Internally
generated and regulated voltages are provided for
program and erase operations, so that the device
does not require a high voltage power supply to
perform those functions. The device can also be
programmed in standard EPROM programmers.
Access times as fast as 55 ns over the full operat-
ing voltage range of 5.0 volts ± 10% are offered
for timing compatibility with the zero wait state re-
quirements of high speed microprocessors. A 55
ns version operating over 5.0 volts ± 5% is also
Preliminary
Revision 1.0, January 2002
Sector Protection
– Any combination of sectors may be locked
to prevent program or erase operations
within those sectors
Temporary Sector Unprotect
– Allows changes in locked sectors
(requires high voltage on RESET# pin)
Internal Erase Algorithm
– Automatically erases a sector, any
combination of sectors, or the entire chip
Internal Programming Algorithm
– Automatically programs and verifies data
at a specified address
Fast Program and Erase Times
– Byte programming time: 7 µs typical
– Sector erase time: 1.0 sec typical
– Chip erase time: 11 sec typical
Data# Polling and Toggle Status Bits
– Provide software confirmation of
completion of program or erase
operations
Ready/Busy# Output (RY/BY#)
– Provides hardware confirmation of
completion of program and erase
operations
100,000 Program/Erase Cycles Minimum
Space Efficient Packaging
– Available in industry-standard 44-pin
PSOP and 48-pin TSOP and reverse
TSOP packages
LOGIC DIAGRAM
18
A[17:0]
DQ[7:0]
7
CE#
OE#
WE#
RESET#
BYTE#
RY/BY#
DQ[14:8]
DQ[15]/A-1
8
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