74LVT16245MTDX datasheet, PDF - EEWORLD Datasheet

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74LVT16245MTDX: DescriptionLVT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48; Categorylogic logic; File Size92KB，8 Pages; ManufacturerFairchild; Websitehttp://www.fairchildsemi.com/; Environmental Compliance

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74LVT16245MTDX Overview

LVT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48

74LVT16245MTDX Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Fairchild
Parts packaging code	TSSOP
package instruction	TSSOP, TSSOP48,.3,20
Contacts	48
Reach Compliance Code	unknow
Other features	WITH DIRECTION CONTROL
Control type	COMMON CONTROL
Counting direction	BIDIRECTIONAL
series	LVT
JESD-30 code	R-PDSO-G48
JESD-609 code	e3
length	12.5 mm
Logic integrated circuit type	BUS TRANSCEIVER
MaximumI(ol)	0.064 A
Humidity sensitivity level	2
Number of digits	8
Number of functions	2
Number of ports	2
Number of terminals	48
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP48,.3,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Prop。Delay @ Nom-Su	3.5 ns
propagation delay (tpd)	3.9 ns
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	BICMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
translate	N/A
width	6.1 mm
Base Number Matches	1

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74LVT16245 • 74LVTH16245 Low Voltage 16-Bit Transceiver with 3-STATE Outputs

January 1999

Revised June 2005

74LVT16245 • 74LVTH16245

Low Voltage 16-Bit Transceiver with 3-STATE Outputs

General Description

The LVT16245 and LVTH16245 contain sixteen non-invert-

ing bidirectional buffers with 3-STATE outputs and is

intended for bus oriented applications. The device is byte

controlled. Each byte has separate control inputs which

can be shorted together for full 16-bit operation. The T/R

inputs determine the direction of data flow through the

device. The OE inputs disable both the A and B ports by

placing them in a high impedance state.

The LVTH16245 data inputs include bushold, eliminating

the need for external pull-up resistors to hold unused

inputs.

These non-inverting transceivers are designed for low-volt-

age (3.3V) V

applications, but with the capability to pro-

vide a TTL interface to a 5V environment. The LVT16245

and LVTH16245 are fabricated with an advanced BiCMOS

technology to achieve high speed operation similar to 5V

ABT while maintaining low power dissipation.

Features

Input and output interface capability to systems at

5V V

Bushold data inputs eliminate the need for external

pull-up resistors to hold unused inputs (74LVTH16245),

also available without bushold feature (74LVT16245).

Live insertion/extraction permitted

Power Up/Down high impedance provides glitch-free

bus loading

Outputs source/sink

32 mA/

64 mA

Functionally compatible with the 74 series 16245

Latch-up performance exceeds 500 mA

ESD performance:

Human-body model

2000V

Machine model

200V

Charged-device

1000V

Also packaged in plastic Fine-Pitch Ball Grid Array

(FBGA) (Preliminary)

Ordering Code:

Order Number

74LVT16245GX

(Note 1)

74LVT16245MEA

(Note 2)

74LVT16245MTD

(Note 2)

74LVTH16245GX

(Note 1)

74LVTH16245MEA

(Note 2)

74LVTH16245MTD

(Note 2)

Package

Number

BGA54A

(Preliminary)

MS48A

MTD48

BGA54A

(Preliminary)

MS48A

MTD48

Package Description

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

[Tape and Reel]

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

[Tape and Reel]

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Note 1:

BGA package available in Tape and Reel only.

Note 2:

Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

DS500152

www.fairchildsemi.com

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