EEWORLDEEWORLDEEWORLD

Part Number

Search

503548-1280

Description
Board to Board & Mezzanine Connectors 0.4 B/B HRF REC CHECKER PKG 12CKT
CategoryThe connector   
File Size379KB,4 Pages
ManufacturerMolex
Websitehttps://www.molex.com/molex/home
Environmental Compliance
Download Datasheet Parametric View All

503548-1280 Online Shopping

Suppliers Part Number Price MOQ In stock  
503548-1280 - - View Buy Now

503548-1280 Overview

Board to Board & Mezzanine Connectors 0.4 B/B HRF REC CHECKER PKG 12CKT

503548-1280 Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerMolex
Product CategoryBoard to Board & Mezzanine Connectors
RoHSDetails
Factory Pack Quantity3000
9
8
7
6
5
4
NOTES
3
2
1
E
REEL
1. ½品詳細寸法については½品単½図面を参照下さい。
DETAIL DIMENSION, SEE PRODUCT DRAWING.
2. 梱包数量: 3000個/リール
NUMBER OF CONNECTORS : 3000 PCS/REEL.
3. リードテープ長さ LEAD TAPE LENGTH.
引き出し方向
PULL OUT
DIRECTION
20
PCS.MIN.
トップテープ接着部(空エンボス)
TOP TAPE BONDED PART(EMPTY)
E
引き出し方向
PULL OUT
DIRECTION
400
MIN.
部品挿入部
COMPONENT
SUPPLIER
末端部(空部)
TAIL PART
(EMPTY)
40
MIN.
末端(空エンボス)部長さはリールの芯に1周以上巻くこと。
330
±
2
D
4. トップテープの剥離強度:0.1N~1.3N(10gf~130gf)
(剥離方向は下図参照)
尚、本規格値は出荷時に適用。(½し、輸送時に剥離が発生しないこと。)
PEELING OFF FORCE OF TOP TAPE : 0.1N~1.3N(10gf~130gf)
(PEELING DIRECTION AS SHOWN IN FOLLOWING FIG.)
THIS REQUIREMENT SHOULD BE APPLIED AT SHIPMENT.
PEEL OFF SHOULD NOT BE ALLOWED , DURING TRANSPORTATION.
剥離方向
PEEL OFF
DIRECTION
(
80)
D
DETAIL 'D'
B
±
1
引き出し方向
PULL OUT
DIRECTION
10
°
C
±
1
C
5. 材料 MATERIAL
キャリアテープ (CARRIER TAPE) : ポリスチレン
(POLYSTYRENE)
トップテープ (TOP TAPE) : PET , OTHER
リール (REEL) : ポリスチレン (PS) [リサイクル材を含む]
C
(
10
)
B
(
22
)
(
2
)
(
120
°
)
B
MODEL NO. : 503548**80
2017/06/29
2017/06/29
2017/06/30
(
21
)
(
13
)
THIS DRAWING CONTAINS INFORMATION THAT IS PROPRIETARY TO MOLEX ELECTRONIC TECHNOLOGIES, LLC AND SHOULD NOT BE USED WITHOUT WRITTEN PERMISSION
GENERAL
TOLERANCES
(UNLESS SPECIFIED)
ANGULAR TOL ±
°
DIMENSION UNITS
SCALE
MM
DRWN BY
DATE
1:1
2017/05/25
DATE
118757
TMIYAZAKI
KTAKAHASHI
MSASAO
DETAIL "D"
A
4 PLACES
3 PLACES
2 PLACES
1 PLACE
0 PLACES
±
±
±
±
±
TMIYAZAKI
CHK'D BY
0.4 B-TO-B CONN. HGT=0.7 HI-RETENTION
REC ASSY CHECKER TYPE EMBSTP PKG
KTAKAHASHI
APPR BY
DATE
2017/06/08
2017/06/09
A
PRODUCT CUSTOMER DRAWING
SERIES
MATERIAL NUMBER
CUSTOMER
MSASAO
DRAWING SIZE
EC NO:
DRWN:
CHK'D:
APPR:
THIRD ANGLE PROJECTION
REV
THIS DOCUMENT HAS BEEN RE-ISSUED BASED ON SD-503548-008, REV 0
RELEASE STATUS
FORMAT: master-tb-prod-A3
REVISION: G
DATE: 2017/02/06
9
P1
RELEASE DATE
30.06.2017
8
07:10:58
7
6
5
B
DRAFT WHERE APPLICABLE
MUST REMAIN
WITHIN DIMENSIONS
503548
DOCUMENT NUMBER
SEE SHEET 2
GENERAL
A3
3
DOC TYPE
DOC PART
SHEET NUMBER
4
5035480000
2
PSD
001
1
1 OF 2
Please tell me how to simulate PLL in modelsim
I'm working on something now, which uses PLL and triples the clock: PLL39MHzx3 PLL39MHzx3_M( .inclk0(DSP39MHz), .c0(CLK_M) ); It works fine when downloaded to FPGA. However, when I use modelsim to sim...
astwyg FPGA/CPLD
Regarding LM4F232, please help
[b]The underlying library function of CFAL9664B-F-B1:[/b] [color=#0080][font=Arial][size=6]cfal96x64x16.c[/size][/font][/color] Please explain or provide information....
benbending Microcontroller MCU
[Repost] PCB design process (newbies must read)
[Repost] PCB design process (must read for novices) For more exciting information, please visit: [url]http://www.51dz.com/index.asp?i=wen3329[/url] The basic design process of general PCB is as follow...
hcbhcbhcbhcb MCU
[Help] Help, 430F149 self-modification code problem?
My device is used in vehicles, and uses the 149 internal information segment and unused program code area to store information. After installing it, within a few days, the devices started to have prob...
Hellenlee Microcontroller MCU
[Q&A] A novice asks for help: How are analog ground and digital ground divided?
As the title says, how are analog ground and digital ground divided?...
桂花篜 Analog electronics
How to consider the technology, cost and market of FPGA products?
[b]EDN China: FPGA relies on improving production technology to reduce costs, but at the same time, the power consumption of the chip will increase. How does Altera solve this problem? [/b] [b]Jordan ...
songbo FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 569  2274  2025  965  2720  12  46  41  20  55 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号