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IN74LV240N

Description
OCTAL BUFFER/LINE DRIVE; 3-STATE
Categorylogic    logic   
File Size46KB,5 Pages
ManufacturerINTEGRAL
Websitehttp://www.integral.by/english.phtml
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IN74LV240N Overview

OCTAL BUFFER/LINE DRIVE; 3-STATE

IN74LV240N Parametric

Parameter NameAttribute value
MakerINTEGRAL
package instruction,
Reach Compliance Codeunknow
TECHNICAL DATA
IN74LV240
OCTAL BUFFER/LINE DRIVE; 3-STATE
The IN74LV240 is a low-voltage Si-gate CMOS device and is pin and
function compatible with IN74HC/HCT240.
The IN74LV240 is an octal non-inverting buffer/line driver with 3-
state outputs. The 3-state outputs are controlled by the output enable
inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a
high impedance OFF-state.
The IN74LV240 is identical to the IN74LV244 but has inverting
outputs.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 1.2 to 3.6 V
Low Input Current: 1.0
µA,
0.1
µÀ
at Ò = 25
°Ñ
Output Current: 8 mA at V
CC
= 3.0 V
High Noise Immunity Characteristic of CMOS Devices
N SUFFIX
PLASTIC DIP
20
1
20
1
DW SUFFIX
SO
ORDERING INFORMATION
IN74LV240N
IN74LV240DW
IZ74LV240
Plastic DIP
SOIC
chip
T
A
= -40° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
1A
0
1A
1
1A
2
1A
3
2A
0
2A
1
2A
0
2
4
18
16
1Y
0
1OE
1Y
1
1Y
2
1Y
3
2Y
0
2Y
1
2Y
0
2Y
1
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
2OE
1Y
0
2A
3
1Y
1
2A
2
1Y
2
2A
1
1Y
3
2A
0
1A
0
2Y
3
1A
1
2Y
2
1A
2
2Y
1
1A
3
2Y
0
6
8
14
12
DATA
INPUTS
11
13
15
9
7
5
INVERTING
OUTPUTS
GND
2A
1
17
3
OUTPUT
ENABLES
1OE
2OE
1
19
FUNCTION TABLE
Input
nOE
L
PIN 20=V
CC
PIN 10 = GND
L
H
nAn
L
H
X
Output
nYn
H
L
Z
H= high level
L = low level
X = don’t care
Z = high impedance
INTEGRAL
1

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IN74LV240N IN74LV240 IN74LV240DW IZ74LV240
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