70V3389S6PRFG8 datasheet, PDF - EEWORLD Datasheet

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70V3389S6PRFG8: DescriptionDual-Port SRAM, 64KX18, 6ns, CMOS, PQFP128, 14 X 20 MM X 1.40 MM, GREEN, PLASTIC, TQFP-128; Categorystorage storage; File Size189KB，17 Pages; ManufacturerIDT (Integrated Device Technology)

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70V3389S6PRFG8 Overview

Dual-Port SRAM, 64KX18, 6ns, CMOS, PQFP128, 14 X 20 MM X 1.40 MM, GREEN, PLASTIC, TQFP-128

70V3389S6PRFG8 Parametric

Parameter Name	Attribute value
Maker	IDT (Integrated Device Technology)
package instruction	LFQFP,
Reach Compliance Code	compliant
Is Samacsys	N
Maximum access time	6 ns
JESD-30 code	R-PQFP-G128
length	20 mm
memory density	1179648 bit
Memory IC Type	DUAL-PORT SRAM
memory width	18
Number of functions	1
Number of terminals	128
word count	65536 words
character code	64000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	64KX18
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Package shape	RECTANGULAR
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Maximum seat height	1.6 mm
Maximum supply voltage (Vsup)	3.45 V
Minimum supply voltage (Vsup)	3.15 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
width	14 mm
Base Number Matches	1

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HIGH-SPEED 3.3V 64K x 18

SYNCHRONOUS PIPELINED

DUAL-PORT STATIC RAM

WITH 3.3V OR 2.5V INTERFACE

Features

◆

IDT70V3389S

True Dual-Port memory cells which allow simultaneous

access of the same memory location

◆

High-speed clock to data access

– Commercial: 4.2/5/6ns (max.)

– Industrial: 5ns (max)

◆

Pipelined output mode

◆

Counter enable and reset features

◆

Dual chip enables allow for depth expansion without

additional logic

◆

Full synchronous operation on both ports

– 7.5ns cycle time, 133MHz operation (9.6 Gbps bandwidth)

– Fast 4.2ns clock to data out

– 1.8ns setup to clock and 0.7ns hold on all control, data, and

address inputs @ 133MHz

◆

– Data input, address, byte enable and control registers

– Self-timed write allows fast cycle time

Separate byte controls for multiplexed bus and bus

matching compatibility

LVTTL- compatible, single 3.3V (±150mV) power supply for

core

LVTTL- compatible, selectable 3.3V (±150mV)/2.5V (±125mV)

power supply for I/Os and control signals on each port

Industrial temperature range (-40°C to +85°C) is

available for selected speeds

Available in a 128-pin Thin Quad Plastic Flatpack (TQFP),

208-pin fine pitch Ball Grid Array, and 256-pin Ball

Grid Array

Green parts available, see ordering information

Functional Block Diagram

R/W

B B

1 0

R R

R/W

Dout0-8_L

Dout9-17_L

Dout0-8_R

Dout9-17_R

64K x 18

MEMORY

ARRAY

I/O

0 L

- I/O

1 7 L

CLK

Din_L

Din_R

I/O

- I/O

17R

CLK

15L

CNTRST

ADS

CNTEN

Counter/

Address

Reg.

15R

ADDR_L

ADDR_R

Counter/

Address

Reg.

CNTRST

ADS

CNTEN

4832 tbl 01

OCTOBER 2014

DSC 4832/13

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Description	Dual-Port SRAM, 64KX18, 6ns, CMOS, PQFP128, 14 X 20 MM X 1.40 MM, GREEN, PLASTIC, TQFP-128	Application Specific SRAM, 64KX18, 5ns, CMOS, PBGA256, 17 X 17 MM, 1.40 MM HEIGHT, 1 MM PITCH, GREEN, BGA-256	Application Specific SRAM, 64KX18, 5ns, CMOS, PBGA256, 17 X 17 MM, 1.40 MM HEIGHT, 1 MM PITCH, GREEN, BGA-256	Application Specific SRAM, 64KX18, 5ns, CMOS, PBGA208, 15 X 15 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, GREEN, FPBGA-208	Dual-Port SRAM, 64KX18, 5ns, CMOS, PQFP128, 14 X 20 MM X 1.40 MM, GREEN, PLASTIC, TQFP-128	Dual-Port SRAM, 64KX18, 5ns, CMOS, PQFP128, 14 X 20 MM X 1.4 MM, GREEN, PLASTIC, TQFP-128
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
package instruction	LFQFP,	BGA, BGA256,16X16,40	BGA, BGA256,16X16,40	BGA, BGA208,17X17,32	LFQFP,	LFQFP,
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant
Maximum access time	6 ns	5 ns	5 ns	5 ns	5 ns	5 ns
JESD-30 code	R-PQFP-G128	S-PBGA-B256	S-PBGA-B256	S-PBGA-B208	R-PQFP-G128	R-PQFP-G128
memory density	1179648 bit	1179648 bit	1179648 bit	1179648 bit	1179648 bit	1179648 bit
Memory IC Type	DUAL-PORT SRAM	APPLICATION SPECIFIC SRAM	APPLICATION SPECIFIC SRAM	APPLICATION SPECIFIC SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM
memory width	18	18	18	18	18	18
Number of functions	1	1	1	1	1	1
Number of terminals	128	256	256	208	128	128
word count	65536 words	65536 words	65536 words	65536 words	65536 words	65536 words
character code	64000	64000	64000	64000	64000	64000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	85 °C	85 °C	85 °C	70 °C
organize	64KX18	64KX18	64KX18	64KX18	64KX18	64KX18
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LFQFP	BGA	BGA	BGA	LFQFP	LFQFP
Package shape	RECTANGULAR	SQUARE	SQUARE	SQUARE	RECTANGULAR	RECTANGULAR
Package form	FLATPACK, LOW PROFILE, FINE PITCH	GRID ARRAY	GRID ARRAY	GRID ARRAY	FLATPACK, LOW PROFILE, FINE PITCH	FLATPACK, LOW PROFILE, FINE PITCH
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Maximum supply voltage (Vsup)	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V	3.45 V
Minimum supply voltage (Vsup)	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V	3.15 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	COMMERCIAL
Terminal form	GULL WING	BALL	BALL	BALL	GULL WING	GULL WING
Terminal pitch	0.5 mm	1 mm	1 mm	0.8 mm	0.5 mm	0.5 mm
Terminal location	QUAD	BOTTOM	BOTTOM	BOTTOM	QUAD	QUAD
Base Number Matches	1	1	1	1	1	1

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